PEB20256E-V21 Infineon Technologies, PEB20256E-V21 Datasheet - Page 78

• Manufacturer Part Number: PEB20256E-V21
• Description: IC CONTROLLER INTERFACE 388-BGA
• Manufacturer: Infineon Technologies

Specifications of PEB20256E-V21

• Function: Multichannel Network Interface Controller (MUNICH)
• Interface: HDLC, PPP, Serial, TMA
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 200mA
• Power (watts): 3W
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 388-BBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Circuits: -
• Other names: PEB20256E-V21; PEB20256E-V21IN

character specified to be mapped is found in service data or the FCS field, it is replaced
by a 2 octet sequence consisting of 7D
EXORed with 20
specification of characters to be mapped, the control escape sequence 7D
the service data stream are always mapped. Opening and closing flags are not affected.
The abort sequence consists of the control escape character followed by a flag character
7E
Between two frames, the interframe time fill character is always 7E
If in the transmit direction a data underrun occurs during transmission of a frame and the
frame has not finished, an abort sequence is automatically sent (escape character
followed by a flag) and an underrun interrupt vector will generated. If the transmit buffer
indicates an empty condition for a channel between two frames (idle or interframe fill),
the protocol machine will continue to send interframe time fill characters. Also an abort
sequence will be generated if a channel is reset or an abort command is issued during
transmission of a frame.
The following CRC modes are supported:
• 16 bit CRC
• 32 bit CRC
CRC computation/check or removing can be disabled.
4.5.4
When programmed in transparent mode, the protocol machine performs fully
transparent data transmission/reception without HDLC framing, i.e. without
• Flag insertion/removing
• CRC generation/CRC check
• Bit stuffing/destuffing (0 bit insertion/removal).
An option ‘Transparent Mode Pack’ is provided to support subchanneling. If
subchanneling is used (logical channels of less than 64 kbit/s), masked bits in the
protocol data are set high and each bit in shared memory maps directly to enabled (not
masked) bits on the serial line. Otherwise they contain protocol data, that is each byte in
shared memory maps directly to a time slot.
A programmable transparent flag can be programmed which will be inserted between
payload data or is removed during reception of a payload data.
An invert option is provided to invert the outgoing or incoming data stream.
4.6
The MUNICH256 contains a mailbox to allow communication between two intelligent
peripherals connected to the PCI bus and the local microprocessor bus. The mailbox is
organized in two pages of eight registers. The first page is used to store information from
Data Sheet
H
(not stuffed).
Transparent Mode
Mailbox
H
1+x
1+x+x
(e.g. 13
5
+x
2
12
+x
H
+x
4
+x
is mapped to 7D
16
5
+x
7
+x
8
+x
H
10
78
(Control Escape) followed by the character
+x
11
H
+x
33
1 2
+x
H
). In addition to the per channel
16
+x
22
+x
Functional Description
2 3
+x
H
26
.
+x
32
PEB 20256 E
PEF 20256 E
H
and 7E
04.2001
H
in