AT32UC3C1128C Atmel Corporation, AT32UC3C1128C Datasheet - Page 1007

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AT32UC3C1128C

Manufacturer Part Number
AT32UC3C1128C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT32UC3C1128C

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
81
Ext Interrupts
100
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
19
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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33.7.10
Name:
Access Type:
Offset:
Reset Value:
• UPDULOCK: Synchronous Channels Update Unlock
This bit is automatically reset when the update is done.
32117C–AVR-08/11
31
23
15
7
-
-
-
-
0: No effect
1: If the UPDM field is set to “0” in
the update of the period value, the duty-cycle and the dead-time values of synchronous channels at the beginning of the next
PWM period. If the UPDM field is set to “1” or “2”, writing the UPDULOCK bit to one will trigger only the update of the period
value and the dead-time values of synchronous channels.
Sync Channels Update Control Register
30
22
14
6
-
-
-
-
SCUC
Read/Write
0x028
0x00000000
29
21
13
5
-
-
-
-
”Sync Channels Mode Register” on page
28
20
12
4
-
-
-
-
27
19
11
3
-
-
-
-
1005, writing the UPDULOCK bit to one will trigger
26
18
10
2
-
-
-
-
25
17
9
1
-
-
-
-
AT32UC3C
UPDULOCK
24
16
8
0
-
-
-
1007

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