AT32UC3C1128C Atmel Corporation, AT32UC3C1128C Datasheet - Page 302

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AT32UC3C1128C

Manufacturer Part Number
AT32UC3C1128C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT32UC3C1128C

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
81
Ext Interrupts
100
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
19
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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17.5
17.5.1
17.5.2
17.5.3
17.5.4
17.5.5
32117C–AVR-08/11
Product Dependencies
I/O Lines
Power Management
Clocks
Interrupts
HMATRIX
In order to use this module, other parts of the system must be configured correctly, as described
below.
The pins used for interfacing the compliant external devices may be multiplexed with I/O Con-
troller lines. The user must first configure the I/O Controller to assign the EBI pins to their
peripheral functions.
To prevent bus errors EBI operation must be terminated before entering sleep mode.
According to the external devices addressed, the following table gives the clocks that should be
enabled by the Power Manager.
Table 17-2.
The EBI interface has one interrupt line connected to the Interrupt Controller:
Handling the EBI interrupt requires configuring the interrupt controller before configuring the EBI.
The EBI interface is connected to the HMATRIX Special Function Register 6 (SFR6). The user
must first write to this HMATRIX.SFR6 to configure the EBI correctly.
Table 17-3.
Clocks name
CLK_EBI
CLK_SDRAMC
CLK_SMC
• SDRAMC_IRQ: Interrupt signal coming from the SDRAMC
SFR6 Bit
Number
[31:2]
1
0
EBI Clocks Configuration
EBI Special Function Register Fields Description
Clocks type
HSB (clock reference, data sampling
and data transfer through HSB)
PB (Register access)
PB (Register access)
CS1A
Bit name
Reserved
0 = Chip Select 1 (NCS[1]) is connected to a Static Memory device. For each
access to the NCS[1] memory space, all related pins act as SMC pins
1 = Chip Select 1 (NCS[1]) is connected to a SDRAM device. For each access
to the NCS[1] memory space, all related pins act as SDRAM pins (SDCS)
Reserved
SDRAM
X
X
Description
Type of the Interfaced Device
SRAM, PROM,
EPROM,
EEPROM, Flash
X
X
AT32UC3C
302

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