AT86RF232 Atmel Corporation, AT86RF232 Datasheet - Page 104

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AT86RF232

Manufacturer Part Number
AT86RF232
Description
Manufacturer
Atmel Corporation
Datasheet

Specifications of AT86RF232

Max. Operating Frequency
0 MHz
Crypto Engine
AES
Operating Voltage (vcc)
1.8 to 3.6
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
0.25
Antenna Diversity
Yes
External Pa Control
Yes
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-100
Receive Current Consumption (ma)
11.8
Transmit Current Consumption (ma)
13.8
Link Budget (dbm)
103
9.2.4 TX Power Ramping
9.2.5 Register Description
104
AT86RF232
Bit
0x05
Read/Write
Reset value
Bit
0x05
Read/Write
Reset value
To optimize the output power spectral density (PSD), the PA buffer and PA are enabled
sequentially, see in
rising edge of pin 11 (SLP_TR). The radio transceiver state changes from PLL_ON to
BUSY_TX. The modulation of the frame starts 16µs after SLP_TR rising edge.
Register 0x05 (PHY_TX_PWR):
The PHY_TX_PWR register controls the output power of the transmitter.
Figure 9-5. Register PHY_TX_PWR.
 Bit 3:0 – TX_PWR
The register bits TX_PWR determine the TX output power of the radio transceiver.
Table 9-4. TX Output Power.
Register Bits
TX_PWR
R/W
R
7
0
3
0
Figure
Value
0xA
0xB
0xC
0xD
0xE
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
0x9
0xF
9-4. In this example the transmission is initiated with the
R/W
R/W
6
0
2
0
TX_PWR
reserved
R/W
R
5
0
1
0
TX Output Power [dBm]
+3.0
+2.8
+2.3
+1.8
+1.3
+0.7
0.0
-12
-17
-1
-2
-3
-4
-5
-7
-9
R/W
R
4
0
0
0
8321A–MCU Wireless–10/11
PHY_TX_PWR
PHY_TX_PWR

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