AT86RF232 Atmel Corporation, AT86RF232 Datasheet - Page 27

• Manufacturer Part Number: AT86RF232
• Manufacturer: Atmel Corporation

Specifications of AT86RF232

• Max. Operating Frequency: 0 MHz
• Crypto Engine: AES
• Operating Voltage (vcc): 1.8 to 3.6
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 0.25
• Antenna Diversity: Yes
• External Pa Control: Yes
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -100
• Receive Current Consumption (ma): 11.8
• Transmit Current Consumption (ma): 13.8
• Link Budget (dbm): 103

6.6.3 Register Description
8321A–MCU Wireless–10/11
Bit
0x0E
Read/Write
Reset value
Bit
0x0E
Read/Write
Reset value
Bit
0x0F
Read/Write
Reset value
Bit
0x0F
Read/Write
Reset value
Register 0x0E (IRQ_MASK):
The IRQ_MASK register controls the interrupt signaling via pin 24 (IRQ).
Figure 6-23. Register IRQ_MASK.
 Bit 7:0 - IRQ_MASK
Mask register for interrupts. IRQ_MASK[7] correspondents with IRQ_7_BAT_LOW.
IRQ_MASK[0] correspondents with IRQ_0_PLL_LOCK.
Table 6-12. IRQ_MASK.
Register Bits
IRQ_MASK
Note:
Register 0x0F (IRQ_STATUS):
The IRQ_STATUS register contains the status of the pending interrupt requests.
Figure 6-24. Register IRQ_STATUS.
For more information to meanings of interrupts, see
Basic Operating Mode.
1.
IRQ_7_BAT_LOW
IRQ_3_TRX_END
If an interrupt is enabled it is recommended to read the interrupt status register
0x0F (IRQ_STATUS) first to clear the history.
R/W
R/W
R
R
7
0
3
0
7
0
3
0
Value
0x00
IRQ_6_TRX_UR
IRQ_2_RX_
START
R/W
R/W
R
R
6
0
2
0
6
0
2
0
Description
The IRQ_MASK register is used to enable or disable
individual interrupts. An interrupt is enabled if the
corresponding bit is set to one. All interrupts are disabled
after power-on sequence (P_ON state) or reset (RESET
state).
Valid values are [0xFF, 0xFE, …, 0x00].
IRQ_MASK
IRQ_MASK
IRQ_1_PLL_
IRQ_5_AMI
UNLOCK
R/W
R/W
R
R
5
0
1
0
5
0
1
0
Table 6-10
IRQ_4_CCA_ED_
IRQ_0_PLL_
DONE
LOCK
R/W
R/W
R
R
4
0
0
0
4
0
0
0
Interrupt Description in
AT86RF232
IRQ_STATUS
IRQ_STATUS
IRQ_MASK
IRQ_MASK
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