AT86RF232 Atmel Corporation, AT86RF232 Datasheet - Page 47

• Manufacturer Part Number: AT86RF232
• Manufacturer: Atmel Corporation

Specifications of AT86RF232

• Max. Operating Frequency: 0 MHz
• Crypto Engine: AES
• Operating Voltage (vcc): 1.8 to 3.6
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 0.25
• Antenna Diversity: Yes
• External Pa Control: Yes
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -100
• Receive Current Consumption (ma): 11.8
• Transmit Current Consumption (ma): 13.8
• Link Budget (dbm): 103

7.2.3 RX_AACK_ON – Receive with Automatic ACK
8321A–MCU Wireless–10/11
The general functionality of the RX_AACK procedure is shown in
The gray shaded area is the standard flow of an RX_AACK transaction for
IEEE 802.15.4 compliant frames, refer to
exceptions for specific operating modes or frame formats, refer to
The frame filtering operation is described in detail in
In RX_AACK_ON state, the radio transceiver listens for incoming frames. After
detecting a valid PHR, the radio transceiver parses the frame content of the MAC
header (MHR), refer to
If the content of the MAC addressing fields of the received frame (refer to
IEEE 802.15.4 Section 7.2.1) matches one of the configured addresses, dependent on
the addressing mode, an address match interrupt IRQ_5 (AMI) is issued, refer to
Section
(Short address, PAN-ID and IEEE address). Frame filtering as described in
Section 7.2.3.4
Mode, the result of frame filtering or FCS check do not affect the generation of an
interrupt IRQ_3 (TRX_END).
By default, only frames that match the address filter and have a valid FCS generate an
interrupt IRQ_3 (TRX_END). An exception applies if promiscuous mode is enabled; see
Section
fails.
During reception the Atmel AT86RF232 parses bit[5] (ACK Request) of the frame
control field of the received data or MAC command frame to check if an ACK reply is
expected. In that case and if the frame passes the third level of filtering, see
IEEE 802.15.4-2006, Section 7.5.6.2, the radio transceiver automatically generates and
transmits an ACK frame. The sequence number is copied from the received frame.
The content of the frame pending subfield of the ACK response is set by register bit
AACK_SET_PD (register 0x2E, CSMA_SEED_1) when the ACK frame is sent in
response to a data request MAC command frame, otherwise this subfield is set to zero.
Optionally, the start of the transmission of the acknowledgement frame can be
influenced by register bit AACK_ACK_TIME. Default value (according to standard
IEEE 802.15.4) is 12 symbol periods after the reception of the last symbol of a data or
MAC command frame.
If the register bit AACK_DIS_ACK (register 0x2E, CSMA_SEED_1) is set, no
acknowledgement frame is sent even if an acknowledgment frame was requested. This
is useful for operating the MAC hardware accelerator in promiscuous mode, see
Section
The status of the RX_AACK operation is indicated by register bits TRAC_STATUS
(register 0x02, TRAC_STATUS), see
During the operations described above, the AT86RF232 remains in BUSY_RX_AACK
state.
7.2.3.4. The expected address values are to be stored in registers 0x20 – 0x2B
7.2.3.2, in that case an IRQ_3 (TRX_END) interrupt is issued, even if the FCS
7.2.3.2.
is also applied in Basic Operating Mode. However, in Basic Operating
Section
8.1.2.
Section
Section
7.2.7.
Section
7.2.3.2. All other procedures are
7.2.3.4.
Figure
AT86RF232
Section
7-11.
7.2.3.3.
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