AT90CAN64 Atmel Corporation, AT90CAN64 Datasheet - Page 250

• Manufacturer Part Number: AT90CAN64
• Manufacturer: Atmel Corporation

Specifications of AT90CAN64

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Can: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

19.8.2
250
CANSTMOB.6
CANSTMOB.4
CANSTMOB.1
CANSTMOB.5
CANSTMOB.3
CANSTMOB.2
CANSTMOB.0
CANGIT.1
CANGIT.5
CANGIT.4
CANGIT.3
CANGIT.2
CANGIT.0
CANGIT.6
AT90CAN32/64/128
Interrupt Behavior
OVRTIM
TXOK[i]
RXOK[i]
BERR[i]
SERR[i]
CERR[i]
FERR[i]
AERR[i]
BOFFI
BXOK
SERG
CERG
FERG
AERG
Figure 19-14. CAN Controller Interrupt Structure
When an interrupt occurs, an interrupt flag bit is set in the corresponding MOb-CANSTMOB reg-
ister or in the general CANGIT register. If in the CANIE register, ENRX / ENTX / ENERR bit are
set, then the corresponding MOb bit is set in the CANSITn register.
To acknowledge a MOb interrupt, the corresponding bits of CANSTMOB register (RXOK,
TXOK,...) must be cleared by the software application. This operation needs a read-modify-write
software routine.
To acknowledge a general interrupt, the corresponding bits of CANGIT register (BXOK, BOF-
FIT,...) must be cleared by the software application. This operation is made writing a logical one
in these interrupt flags (writing a logical zero doesn’t change the interrupt flag value).
OVRTIM interrupt flag is reset as the other interrupt sources of CANGIT register and is also
reset entering in its dedicated interrupt handler.
When the CAN node is in transmission and detects a Form Error in its frame, a bit Error will also
be raised. Consequently, two consecutive interrupts can occur, both due to the same error.
When a MOb error occurs and is set in its own CANSTMOB register, no general error is set in
CANGIT register.
CANGIE.4
ENTX
CANGIE.5
ENRX
CANGIE.3
CANGIE.2
ENERR
ENBX
CANGIE.1
ENERG
CANSIT 1/2
SIT[i]
CANGIE.6
ENBOFF
CANIE 1/2
IEMOB[i]
0
i
CANGIT.7
CANIT
CANGIE.7
CANGIE.0
ENOVRT
ENIT
7679H–CAN–08/08
CAN IT
OVR IT