AT90CAN64 Atmel Corporation, AT90CAN64 Datasheet - Page 261
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AT90CAN64
Manufacturer Part Number
AT90CAN64
Description
Manufacturer
Atmel Corporation
Specifications of AT90CAN64
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
8
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
2
Can
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
8
Input Capture Channels
2
Pwm Channels
7
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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19.11 MOb Registers
19.11.1
7679H–CAN–08/08
CAN MOb Status Register - CANSTMOB
• Bit 7:4 – MOBNB3:0: MOb Number
Selection of the MOb number, the available numbers are from 0 to 14.
• Bit 3 – AINC: Auto Increment of the FIFO CAN Data Buffer Index (Active Low)
• Bit 2:0 – INDX2:0: FIFO CAN Data Buffer Index
Byte location of the CAN data byte into the FIFO for the defined MOb.
The MOb registers has no initial (default) value after RESET.
• Bit 7 – DLCW: Data Length Code Warning
The incoming message does not have the DLC expected. Whatever the frame type, the DLC
field of the CANCDMOB register is updated by the received DLC.
• Bit 6 – TXOK: Transmit OK
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
The communication enabled by transmission is completed.
TxOK rises at the end of EOF field and then, the MOb is disabled (the corresponding ENMOB-bit
of CANEN registers is cleared). When the controller is ready to send a frame, if two or more
message objects are enabled as producers, the lower MOb index is supplied first.
• Bit 5 – RXOK: Receive OK
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
The communication enabled by reception is completed.
RxOK rises at the end of the 6
ing ENMOB-bit of CANEN registers is cleared). In case of two or more message object reception
hits, the lower MOb index is updated first.
• Bit 4 – BERR: Bit Error (Only in Transmission)
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
The bit value monitored is different from the bit value sent.
Exceptions: the monitored recessive bit sent as a dominant bit during the arbitration field and the
acknowledge slot detecting a dominant bit during the sending of an error frame.
Initial Value
Read/Write
Bit
– 0 - auto increment of the index (default value).
– 1- no auto increment of the index.
DLCW
R/W
7
-
TXOK
R/W
6
-
RXOK
th
R/W
5
-
bit of EOF field and then, the MOb is disabled (the correspond-
BERR
R/W
4
-
SERR
R/W
3
-
CERR
R/W
2
-
AT90CAN32/64/128
FERR
R/W
1
-
AERR
R/W
0
-
CANSTMOB
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