SAM3U2E Atmel Corporation, SAM3U2E Datasheet - Page 290
SAM3U2E
Manufacturer Part Number
SAM3U2E
Description
Manufacturer
Atmel Corporation
Specifications of SAM3U2E
Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
57
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
5
Twi (i2c)
2
Uart
5
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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19.4.6
19.4.6.1
Figure 19-5. Raising the VDDUTMI Power Supply
290
290
Zero-Power Power-On
Backup Power Supply
Reset Cell output
Core Power Supply
Oscillator output
Oscillator output
22 - 42 kHz RC
vddcore_nreset
SHDN / vr_on
periph_nreset
Fast RC
proc_nreset
bodcore_in
SAM3U Series
SAM3U Series
Backup Power Supply Reset
Raising the Backup Power Supply
NRST
Note: After “proc_nreset” rising, the core starts fecthing instructions from Flash at 4 MHz.
As soon as the backup voltage VDDUTMI rises, the RC oscillator is powered up and the zero-
power power-on reset cell maintains its output low as long as VDDUTMI has not reached its tar-
get voltage. During this time, the Supply Controller is entirely reset. When the VDDUTMI voltage
becomes valid and zero-power power-on reset signal is released, a counter is started for 5 slow
clock cycles. This is the time it takes for the 32 kHz RC oscillator to stabilize.
After this time, the SHDN pin is asserted and the voltage regulator is enabled. The core power
supply rises and the brownout detector provides the bodcore_in signal as soon as the core volt-
age VDDCORE is valid. This results in releasing the vddcore_nreset signal to the Reset
Controller after the bodcore_in signal has been confirmed as being valid for at least one slow
clock cycle.
Zero-Power POR
7 x Slow Clock Cycles
T
Regulator
ON
Voltage
3 x Slow Clock
Cycles
3 x Slow Clock
Cycles
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
6.5 x Slow Clock
Cycles
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