SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 985
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SAM4S16C
Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Specifications of SAM4S16C
Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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Figure 37-12. Data OUT Transfer for Ping-pong Endpoint
Note:
37.6.2.4
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
USB Bus
Packets
RX_DATA_BK0 Flag
(UDP_CSRx)
RX_DATA_BK1 Flag
(UDP_CSRx)
FIFO (DPR)
Bank 0
FIFO (DPR)
Bank 1
An interrupt is pending while the RX_DATA_BK0 or RX_DATA_BK1 flag is set.
Stall Handshake
Host Sends First Data Payload
Data OUT
PID
Set by USB Device,
Data Payload Written
in FIFO Endpoint Bank 0
Write by USB Device
Data OUT1
Warning: When RX_DATA_BK0 and RX_DATA_BK1 are both set, there is no way to determine
which one to clear first. Thus the software must keep an internal counter to be sure to clear alter-
natively RX_DATA_BK0 then RX_DATA_BK1. This situation may occur when the software
application is busy elsewhere and the two banks are filled by the USB host. Once the application
comes back to the USB driver, the two flags are set.
A stall handshake can be used in one of two distinct occasions. (For more information on the
stall handshake, refer to Chapter 8 of the Universal Serial Bus Specification, Rev 2.0.)
The following procedure generates a stall packet:
11. The microcontroller notifies the USB device it has finished the transfer by clearing
12. A fourth Data OUT packet can be accepted by the USB device and copied in the FIFO
• A functional stall is used when the halt feature associated with the endpoint is set. (Refer to
• To abort the current request, a protocol stall is used, but uniquely with control transfer.
1. The microcontroller sets the FORCESTALL flag in the UDP_CSRx endpoint’s register.
2. The host receives the stall packet.
Chapter 9 of the Universal Serial Bus Specification, Rev 2.0, for more information on the halt
feature.)
RX_DATA_BK1 in the endpoint’s UDP_CSRx register.
Bank 0.
Data OUT 1
ACK
PID
Read By Microcontroller
Set by USB Device,
Data Payload Written
in FIFO Endpoint Bank 1
Interrupt Pending
Microcontroller Reads Data 1 in Bank 0,
Host Sends Second Data Payload
Data OUT 1
Data OUT
PID
Write by USB Device
Data OUT 2
Data OUT 2
Cleared by Firmware
ACK
PID
Read By Microcontroller
Microcontroller Reads Data2 in Bank 1,
Host Sends Third Data Payload
Data OUT
PID
Interrupt Pending
Data OUT 2
Write In Progress
Cleared by Firmware
Data OUT 3
Data OUT 3
SAM4S
SAM4S
A
P
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