SAM9G20 Atmel Corporation, SAM9G20 Datasheet - Page 21

• Manufacturer Part Number: SAM9G20
• Manufacturer: Atmel Corporation

Specifications of SAM9G20

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 7
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 95
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

6.3.3
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
DDR2SDR Controller
• Multiple device adaptability
• Multiple Wait State Management
• Slow Clock mode supported
• Supports 8-bank DDR2, LPDDR2, SDR and LPSDR
• Numerous Configurations Supported
• Programming Facilities
• Energy-saving Capabilities
• SDRAM Power-up Initialization by Software
• CAS Latency of 2, 3 Supported
• Auto Precharge Command Not Used
• SDR-SDRAM with 16-bit Datapath and Eight Columns Not Supported
– Control signals programmable setup, pulse and hold time for each Memory Bank
– Programmable Wait State Generation
– External Wait Request
– Programmable Data Float Time
– 2K, 4K, 8K, 16K Row Address Memory Parts
– SDRAM with 8 Internal Banks
– SDR-SDRAM with 32-bit Data Path
– DDR2/LPDDR with 16-bit Data Path
– One Chip Select for SDRAM Device (256 Mbyte Address Space)
– Multibank Ping-pong Access (Up to 8 Banks Opened at Same Time = Reduces
– Timing Parameters Specified by Software
– Automatic Refresh Operation, Refresh Rate is Programmable
– Automatic Update of DS, TCR and PASR Parameters (LPSDR)
– Self-refresh, Power-down and Deep Power Modes Supported
– Clock Frequency Change in Precharge Power-down Mode Not Supported
Average Latency of Transactions)
SAM9G35
SAM9G35
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