SAM9G20 Atmel Corporation, SAM9G20 Datasheet - Page 938
SAM9G20
Manufacturer Part Number
SAM9G20
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G20.pdf
(42 pages)
5.SAM9G20.pdf
(832 pages)
Specifications of SAM9G20
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
7
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
95
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9G20 PDF datasheet #4
- SAM9G20 PDF datasheet #5
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• STARTUP: Start Up Time
• TRACKTIM: Tracking Time
• USEQ: Use Sequence Enable
938
Tracking Time = (TRACKTIM + 1) * ADCClock periods.
Value
Value
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
0
1
SAM9G35
NUM_ORDER
REG_ORDER
SUT112
SUT512
SUT576
SUT640
SUT704
SUT768
SUT832
SUT896
SUT960
SUT16
SUT24
SUT64
SUT80
SUT96
Name
SUT0
SUT8
Name
Description
0 periods of ADCClock
8 periods of ADCClock
16 periods of ADCClock
24 periods of ADCClock
64 periods of ADCClock
80 periods of ADCClock
96 periods of ADCClock
112 periods of ADCClock
512 periods of ADCClock
576 periods of ADCClock
640 periods of ADCClock
704 periods of ADCClock
768 periods of ADCClock
832 periods of ADCClock
896 periods of ADCClock
960 periods of ADCClock
Description
Normal Mode: The controller converts channels in a simple numeric order.
User Sequence Mode: The sequence respects what is defined in ADC_SEQR1 and ADC_SEQR2
registers.
11053B–ATARM–22-Sep-11
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