SAM9G20 Atmel Corporation, SAM9G20 Datasheet - Page 415
SAM9G20
Manufacturer Part Number
SAM9G20
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G20.pdf
(42 pages)
5.SAM9G20.pdf
(832 pages)
Specifications of SAM9G20
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
7
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
95
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9G20 PDF datasheet #4
- SAM9G20 PDF datasheet #5
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29.15 Programmable IO Delays
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
The external bus interface consists of a data bus, an address bus and control signals. The simul-
taneous switching outputs on these busses may lead to a peak of current in the internal and
external power supply lines.
In order to reduce the peak of current in such cases, additional propagation delays can be
adjusted independently for pad buffers by means of configuration registers, SMC_DELAY1-8.
The additional programmable delays for each IO range from 0 to 4 ns (Worst Case PVT). The
delay can differ between IOs supporting this feature. Delay can be modified per programming for
each IO. The minimal additional delay that can be programmed on a PAD suppporting this fea-
ture is 1/16 of the maximum programmable delay.
When programming 0x0 in fields “Delay1 to Delay 8”, no delay is added (reset value) and the
propagation delay of the pad buffers is the inherent delay of the pad buffer. When programming
0xF in field “Delay1” the propagation delay of the corresponding pad is maximal.
SMC_DELAY1, SMC_DELAY2 allow to configure delay on D[15:0], SMC_DELAY1[3:0] corre-
sponds to D[0] and SMC_DELAY2[3:0] corresponds to D[8].
SMC_DELAY3, SMC_DELAY4 allow to configure delay on D[31:16], SMC_DELAY3[3:0] corre-
sponds to D[16] and SMC_DELAY4[3:0] corresponds to D[24]. In case of multiplexing through
the PIO controller, refer to the alternate function of D[31:16].
SMC_DELAY5, 6, 7 and 8 allow to configure delay on A[25:0], SMC_DELAY5[3:0] corresponds
to A[0]. In case of multiplexing through the PIO controller, refer to the alternate function of
A[25:0].
Figure 29-36. Programmable IO Delays
SMC
DELAY1
DELAYx
DELAYy
DELAY2
D_out[0]
D_out[1]
D_out[n]
D_in[0]
D_in[1]
D_in[n]
A[m]
PIO
PIO
Programmable Delay Line
Programmable Delay Line
Programmable Delay Line
Programmable Delay Line
SAM9G35
SAM9G35
D[0]
D[1]
D[n]
A[m]
415
415
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