SAM9G20 Atmel Corporation, SAM9G20 Datasheet - Page 537

• Manufacturer Part Number: SAM9G20
• Manufacturer: Atmel Corporation

Specifications of SAM9G20

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 7
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 95
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

33. USB High Speed Device Port (UDPHS)
33.1
33.2
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
Description
Embedded Characteristics
The USB High Speed Device Port (UDPHS) is compliant with the Universal Serial Bus (USB),
rev 2.0 High Speed device specification.
Each endpoint can be configured in one of several USB transfer types. It can be associated with
one, two or three banks of a Dual-port RAM used to store the current data payload. If two or
three banks are used, one DPR bank is read or written by the processor, while the other is read
or written by the USB device peripheral. This feature is mandatory for isochronous endpoints.
The High Speed USB Host Port A is shared with the High Speed USB Device port and con-
nected to the second UTMI transceiver. The selection between Host Port A and USB Device is
controlled by the UDPHS enable bit (EN_UDPHS) located in the UDPHS_CTRL control register.
Figure 33-1. USB Selection
• 1 Device High Speed
• USB v2.0 High Speed Compliant, 480 Mbits Per Second
• UTMI Compliant
•
• Embedded Dual-port RAM for Endpoints
• Suspend/Resume Logic (Command of UTMI)
• Up to Three Memory Banks for Endpoints (Not for Control Endpoint)
• 4 KBytes of DPRAM
7
Endpoints
Transceiver
FS
PC
HS USB Host
HS EHCI
FS OHCI
Transceiver
DMA
PB
HS
PA
0
Transceiver
HS
Device
USB
DMA
HS
1
EN_UDPHS
SAM9G35
SAM9G35
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