SAM9G20 Atmel Corporation, SAM9G20 Datasheet - Page 281

• Manufacturer Part Number: SAM9G20
• Manufacturer: Atmel Corporation

Specifications of SAM9G20

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 7
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 95
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

25. Clock Generator
25.1
25.2
25.3
25.4
6384E–ATARM–05-Feb-10
Overview
Slow Clock Crystal Oscillator
Slow Clock RC Oscillator
Main Oscillator
The Clock Generator is made up of 2 PLLs, a Main Oscillator, as well as an RC Oscillator and a
32,768 Hz low-power Oscillator.
It provides the following clocks:
The Clock Generator User Interface is embedded within the Power Management Controller one
and is described in
The Clock Generator integrates a 32,768 Hz low-power oscillator. The XIN32 and XOUT32 pins
must be connected to a 32,768 Hz crystal. Two external capacitors must be wired as shown in
Figure
Figure 25-1. Typical Slow Clock Crystal Oscillator Connection
The user has to take into account the possible drifts of the RC Oscillator. More details are given
in the section “DC Characteristics” of the product datasheet.
Figure 25-2
• SLCK, the Slow Clock, which is the only permanent clock within the system
• MAINCK is the output of the Main Oscillator
• PLLACK is the output of the Divider and PLL A block
• PLLBCK is the output of the Divider and PLL B block
25-1.
shows the Main Oscillator block diagram.
Section
26.9. However, the Clock Generator registers are named CKGR_.
XIN32
32,768 Hz
Crystal
XOUT32
GNDPLL
AT91SAM9G20
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