SAM9G20 Atmel Corporation, SAM9G20 Datasheet - Page 822

• Manufacturer Part Number: SAM9G20
• Manufacturer: Atmel Corporation

Specifications of SAM9G20

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 7
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 95
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

822
Doc. Rev
6384B
Doc. Rev
6384A
AT91SAM9G20
Comments
Overview
“Features” on page
Section 10.4.3
Section 8.1.1.1 “BMS = 1, Boot on Embedded
– SDCard,
Signal Description,
Section 6.6 “Shutdown Logic
AT91SAM9G20 Boot Program
Section 13.3 “Device
“Enable the user reset” removed from initialization steps.
Section 13.8 “SDCard Boot”
Section 13.11 “Hardware and Software Constraints”
capacity SDCards.”
DBGU
Section 28.1
purpose serial communication.”
PMC
Section 26.9.11 “PMC Master Clock
Processor Clock replaced Master Clock in description.
Electrical Characteristics:
Section 41.8 “Core Power Supply POR
“VDDCORE and VDDIO Constraints at Startup”
41.11.2 “SPI”
Figure 41-7. “SPI Master Mode with (CPOL = 0 and NCPHA = 1) or (CPOL =1 and NCPHA = 0)”
Figure 41-8. “SPI Master Mode with (CPOL = NCPHA = 0) or (CPOL and NCPHA = 1)”
Figure 41-9. “SPI Slave Mode with (CPOL = 0 and NCPHA = 1) or (CPOL = 1 and NCPHA = 0)”
Figure 41-10. “SPI Slave Mode with (CPOL = NCPHA = 0) or (CPOL = NCPHA = 1)”
Table 41-4, “Power Consumption by Peripheral in Active Mode”
Table 41-15, “PLLA Characteristics”
Table 41-3, “Power Consumption for Different Modes”
Errata:
Section 44.2.9 “Static Memory Controller
Section 44.2.9.1 “SMC: Chip Select Parameters Modification”
Comments
First issue
(boot ROM does not support high capacity SDCards) clarification added.
“Overview”, added text: “The Debug Unit two-pin UART can be used stand-alone for general
Timings: The titles of the figures listed below have been updated.
“USART”, “Optional Manchester Encoding” added to list of USART features.
Table
1, Debug Unit (DBGU) updated.
Initialization”, updated
3-1, added GNDPLL to table.
added (high capactiy SDCards not support by boot ROM)
Pins”, updated with external pull-up requirement.
Register”: bitfiedld description for
I
PLL
Characteristics”, updated with caution on power-up,
active mode, current consumption is 8 mA.
(SMC)”, added to datasheet with the errata listed below:
ROM”,
updated, and Board Schematics added to section.
added footnote
Active mode, “all peripheral clocks de-activated”.
updatedvalues in Consumption column.
(1)
“PDIV: Processor Clock Division”
“Boot ROM does not support high
Figure 41-2.
6384E–ATARM–05-Feb-10
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