SAM9G20 Atmel Corporation, SAM9G20 Datasheet - Page 77
SAM9G20
Manufacturer Part Number
SAM9G20
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G20.pdf
(42 pages)
5.SAM9G20.pdf
(832 pages)
Specifications of SAM9G20
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
7
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
95
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9G20 PDF datasheet #4
- SAM9G20 PDF datasheet #5
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13.4
13.4.1
13.4.2
6384E–ATARM–05-Feb-10
Valid Image Detection
Valid ARM exception vectors
Structure of ARM Vector 6
Figure 13-2. Remap Action after Download Completion
The DataFlash Boot software looks for a valid application by analyzing the first 28 bytes corre-
sponding to the ARM exception vectors. These bytes must implement ARM instructions for
either branch or load PC with PC relative addressing.
The sixth vector, at offset 0x14, contains the size of the image to download. The user must
replace this vector with his/her own vector (see
Figure 13-3. LDR Opcode
Figure 13-4. B Opcode
Unconditional instruction: 0xE for bits 31 to 28
Load PC with PC relative addressing instruction:
The ARM exception vector 6 is used to store information needed by the DataFlash boot pro-
gram. This information is described below.
31
31
1
1
1
1
– Rn = Rd = PC = 0xF
– I==0
– P==1
– U offset added (U==1) or subtracted (U==0)
– W==1
1
1
28 27
28 27
0
0
0x0000_0000
0x0020_0000
0
1
1
0
1
I
24 23
24 23
P
0
U
Internal
Internal
SRAM
ROM
0
W 1
20 19
Rn
REMAP
“Structure of ARM Vector 6” on page
16 15
Offset (24 bits)
Rd
Internal
Internal
SRAM
ROM
12 11
AT91SAM9G20
0x0000_0000
0x0010_0000
77).
0
0
77
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