ST7FOXK1 STMicroelectronics, ST7FOXK1 Datasheet - Page 103

• Manufacturer Part Number: ST7FOXK1
• Description: Low cost flash 8bit micro
• Manufacturer: STMicroelectronics

Specifications of ST7FOXK1

• 4 To 8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance: 1K write/erase cycles guaranteed Data retention
• Clock Sources: Internal trimmable 8 MHz RC oscillator, auto wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-Halt, Auto Wakeup from Halt, Wait and Slow
• A/d Converter: up to 10 input channels

ST7FOXF1, ST7FOXK1, ST7FOXK2
Note:
Break control register 2 (BREAKCR2)
Reset value: 0000 0000 (00h)
This register is available on ST7FOXK2 only
Bit 7 = BR2SEL Break 2 input selection bit
Bit 6 = BR2EDGE Break 2 input edge selection bit
Bit 5 = BA2 Break 2 Active bit
Bit 4 = BP2EN Break 2 pin enable bit
Bits 3:2 = Reserved, must be kept cleared
Bit 1 = SWBR2 Switch Break for counter 2 bit
Bit 0 = SWBR1 Switch Break for counter 1 bit
BR2SEL
This bit is read/write by software and cleared by hardware after reset. It selects the
active Break 2 signal from external BREAK2 pin and the output of the comparator.
0: External BREAK2 pin is selected for break mode.
1: Comparator 2 output is selected for break mode.
This bit is read/write by software and cleared by hardware after reset. It selects the
active level of Break 2 signal.
0: Low level of Break 2 selected as active level
1: High level of Break 2 selected as active level
This bit is read/write by software, cleared by hardware after reset and set by hardware
when the active level defined by the BR2EDGE bit is applied on the BREAK2 pin. It
activates/deactivates the Break 2 function.
0: Break 2 not active
1: Break 2 active
This bit is read/write by software and cleared by hardware after Reset.
0: BREAK2 pin disabled
1: BREAK2 pin enabled
This bit is read/write by software. While BREN2 is set, it selects BA1 or BA2 to control
PWM2/3 if ENCNTR2 bit is set.
0: BA1 selected
1: BA2 selected
This bit is read/write by software. While BREN1 is set, it selects BA1 or BA2 to control
PWM0/1 by default and also PWM2/3 if ENCNTR2 bit is reset.
0: BA1 selected
1: BA2 selected
7
BR2EDGE
BA2
BP2EN
Read/write
-
-
On-chip peripherals
SWBR2
SWBR1
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