73S1215F Maxim, 73S1215F Datasheet - Page 104

• Manufacturer Part Number: 73S1215F
• Description: The Teridian 73S1215F is a self-contained SoC smart card reader IC that is an ideal solution for any USB-connected ISO 7816 design
• Manufacturer: Maxim

104
FDReg.7
FDReg.6
FDReg.5
FDReg.4
FDReg.3
FDReg.2
FDReg.1
FDReg.0
Bit
0001
0010
0011
0100
1000
0101
1001
0110
0001
0010
0011
0100
1000
0101
1001
0110
code
code
Di
Di
Fi code
Fi code
F→
F→
D↓
D↓
12
16
20
32
12
16
20
32
Symbol
DVAL.3
DVAL.2
DVAL.1
DVAL.0
FVAL.3
FVAL.2
FVAL.1
FVAL.0
1
2
4
8
1
2
4
8
0000
0110
1860
3720
1860
372
744
372
186
930
465
310
233
186
116
93
62
47
37
23
Refer to Table 101 above. This value is converted per the table to set the
divide ratio used to generate the baud rate (ETU). Default, also used for
ATR, is 0001 (Fi = 372). This value is used by the selected interface.
Refer to Table 101 above. This value is used to set the divide ratio used to
generate the smart card CLK. Default, also used for ATR, is 0001 (Di = 1).
Table 101: Divider Values for the ETU Clock
Table 102: The FDReg Bit Functions
0001
1001
1024
372
744
372
186
512
512
256
128
93
62
47
37
23
85
64
51
32
0010
1116
1010
1536
558
558
279
138
768
768
384
192
128
93
70
56
35
96
77
48
Function
0011
1488
1011
1024
2048
1024
744
744
372
186
124
512
256
171
128
102
93
74
47
64
0100
1100
3072
1536
1116
2232
1116
1536
558
279
186
140
112
768
384
256
192
154
70
96
0101
1488
2976
1488
1101
2048
4096
2048
1024
744
372
248
186
149
512
341
256
205
128
93
Rev. 1.4