73S1215F Maxim, 73S1215F Datasheet - Page 107

• Manufacturer Part Number: 73S1215F
• Description: The Teridian 73S1215F is a self-contained SoC smart card reader IC that is an ideal solution for any USB-connected ISO 7816 design
• Manufacturer: Maxim

DS_1215F_003
Block Wait Time Registers (BWTB0): 0xFE1B
0xFE19
These registers (BWTB0, BWTB1, BWTB2, BWTB3) are used to set the Block Waiting Time(27:0)
(BWT). All of these parameters define the maximum time the 73S1215F will have to wait for a character
from the smart card. These registers serve a dual purpose. When T=1, these registers are used to set
up the block wait time. The block wait time defines the time in ETUs between the beginning of the last
character sent to smart card and the start bit of the first character received from smart card. It can be
used to detect an unresponsive card and should be loaded by firmware prior to writing the last TX byte.
When T = 0, these registers are used to set up the work wait time. The work wait time is defined as the
time between the leading edge of two consecutive characters being sent to or from the card. If a timeout
occurs, an interrupt is generated to the firmware. The firmware can then take appropriate action. A Wait
Time Extension (WTX) is supported with the 28-bit BWT.
Character Wait Time Registers (CWTB0): 0xFE1D
These registers (CWTB0, CWTB1) are used to hold the Character Wait Time(15:0) (CWT) or Initial Waiting
Time(15:0) (IWT) depending on the situation. Both the IWT and the CWT measure the time in ETUs
between the leading edge of the start of the current character received from the smart card and the leading
edge of the start of the next character received from the smart card. The only difference is the mode in
which the card is operating. When T=1 these registers are used to configure the CWT and these registers
configure the IWT when the ATR is being received. These registers should be loaded prior to receiving
characters from the smart card. Firmware must manage which time is stored in the register. If a timeout
occurs, an interrupt is generated to the firmware. The firmware can then take appropriate action.
Rev. 1.4
MSB
MSB
MSB
MSB
MSB
MSB
BWT.15
BWT.23
CWT.15
CWT.7
BWT.7
0x00, (BWTB3): 0xFE18
–
CWT.14
BWT.14
BWT.22
CWT.6
BWT.6
–
CWT.13
BWT.13
BWT.21
CWT.5
BWT.5
Table 107: The BWTB0 Register
Table 109: The BWTB2 Register
Table 110: The BWTB3 Register
Table 111: The CWTB0 Register
Table 112: The CWTB1 Register
–
Table 108: The BWTB1 Register
0x00
CWT.12
BWT.12
BWT.20
BWT.4
CWT.4
–
0x00, (BWTB1): 0xFE1A
BWT.11
BWT.19
BWT.27
CWT.11
BWT.3
0x00, (CWTB1): 0xFE1C
CWT.3
CWT.10
BWT.10
BWT.18
BWT.26
CWT.1
BWT.1
BWT.17
BWT.25
CWT.2
CWT.9
BWT.2
BWT.9
0x00, (BWTB2):
73S1215F Data Sheet
0x00
BWT.16
BWT.24
BWT.0
BWT.8
CWT.0
CWT.8
LSB
LSB
LSB
LSB
LSB
LSB
107