73S1215F Maxim, 73S1215F Datasheet - Page 28

• Manufacturer Part Number: 73S1215F
• Description: The Teridian 73S1215F is a self-contained SoC smart card reader IC that is an ideal solution for any USB-connected ISO 7816 design
• Manufacturer: Maxim

28
Notes:
1. The counters are clocked by the MPUCLK
2. TC - Terminal count (high at overflow)
3. CE - Count enable
USR0
USR1
USR2
USR3
USR4
USR5
USR6
USR7
USR[7:0] Control
USRxINTSrc set to
4(ext INT0 high)
6(ext INT0 low)
ANALOG Enable
PLL CLOCKS
PWRDN BIT
PWRDN SIG
EXT. EVENT
INT0 to MPU
or
MPU STOP
t1: 32 MPU clock cycles after t0, the PWRDN SIG is asserted, turning all analog functions OFF.
t2: MPU executes STOP instruction, must be done prior to t1.
text: An external event (RTC, Keypad, Card event, USB) occurs.
t4: PWRDN bit and PWRDN signal are cleared by external event.
t5: High-speed oscillator/PLL/VCO operating.
t0: MPU sets PWRDN bit
t3: Analog functions go to OFF condition. No Vref, PLL/VCO, Ibias, etc.
t6: After 512 MPU clock cycles, INT0 to MPU is asserted.
t7: INT0 causes MPU to exit STOP condition.
INT4
INT5
RESETB
Figure 6: Detail of Power Down Interrupt Logic
t0
Figure 7: Power Down Sequencing
t2
t1
t3
D
CLR
PDMUX
(FF94h:bit7)
RESETB
Q
PWRDN
(FFF1h:bit7)
0
1
RESETB
CE
5 BIT CNTR
CLR
t4
text
TC
t5
INT0
CE
9 BIT CNTR
MPU
CLR
t6
TC
PWRDN_analog
t7
Rev. 1.4