73S1215F Maxim, 73S1215F Datasheet - Page 49

• Manufacturer Part Number: 73S1215F
• Description: The Teridian 73S1215F is a self-contained SoC smart card reader IC that is an ideal solution for any USB-connected ISO 7816 design
• Manufacturer: Maxim

DS_1215F_003
Interrupt Priority 0 Register (IP0): 0xA9
Note: The remaining bits in the IP0 register are not used for watchdog control.
Watchdog Timer Reload Register (WDTREL): 0x86
Rev. 1.4
WDTREL.7
WDTREL.6
WDTREL.0
IP0.6
Bit
Bit
to
MSB
WDPSEL WDREL6 WDREL5 WDREL4 WDREL3 WDREL2 WDREL1 WDREL0
MSB
WDREL6-0
–
Symbol
WDPSEL
WDTS
Symbol
WDTS
The internal reset will be generated, but this bit will not be cleared by the
reset. This allows the user program to determine if the watchdog timer
caused the reset to occur and respond accordingly. Can be read and
cleared by software.
Watchdog timer status flag. Set when the watchdog timer has expired.
Prescaler select bit. When set, the watchdog is clocked through an
additional divide-by-16 prescaler.
Seven bit reload value for the high-byte of the watchdog timer. This
value is loaded to the WDT when a refresh is triggered by a
consecutive setting of bits WDT and SWDT.
IP0.5
Table 47: The WDTREL Register
Table 46: The IP0 Register
IP0.4
0x00
IP0.3
0x00
Function
Function
IP0.2
IP0.1
IP0.0
73S1215F Data Sheet
LSB
LSB
49