TMP86xy49UG/F/NG Toshiba, TMP86xy49UG/F/NG Datasheet - Page 11

• Manufacturer Part Number: TMP86xy49UG/F/NG
• Manufacturer: Toshiba

Specifications of TMP86xy49UG/F/NG

• Package: LQFP64/QFP64/SDIP64
• Rom Types (m=mask,p=otp,f=flash): M/P/F
• Rom Size: 16/32/60
• Ram Size: 512/1K/2K
• Driver Led: 13
• Driver Lcd: -
• Spi/sio Channels: 2
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 56
• Power Supply (v): 4.5 to 5.5

4. Special Function Register (SFR)
5. I/O Ports
6. Watchdog Timer (WDT)
7. Time Base Timer (TBT)
ii
3.4
3.5
3.6
3.7
4.1
4.2
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
6.1
6.2
6.3
7.1
7.2
3.3.3
3.4.1
3.4.2
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
6.3.1
6.3.2
6.3.3
6.3.4
7.1.1
7.1.2
7.1.3
7.2.1
7.2.2
3.3.2.2
Software Interrupt (INTSW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Undefined Instruction Interrupt (INTUNDEF). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Address Trap Interrupt (INTATRAP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
External Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
SFR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
DBR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Port P0 (P07 to P00) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Port P1 (P17 to P10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Port P2 (P22 to P20) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Port P3 (P37 to P30) (Large Current Port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Port P4 (P47 to P40) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Port P5 (P54 to P50) (Large Current Port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Port P6 (P67 to P60) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Port P7 (P77 to P70) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Watchdog Timer Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Watchdog Timer Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Address Trap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Time Base Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Divider Output (DVO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Interrupt return ........................................................................................................................................ 41
Address error detection .......................................................................................................................... 42
Debugging .............................................................................................................................................. 42
Malfunction Detection Methods Using the Watchdog Timer ................................................................... 66
Watchdog Timer Enable ......................................................................................................................... 67
Watchdog Timer Disable ........................................................................................................................ 68
Watchdog Timer Interrupt (INTWDT)...................................................................................................... 68
Watchdog Timer Reset ........................................................................................................................... 69
Selection of Address Trap in Internal RAM (ATAS) ................................................................................ 70
Selection of Operation at Address Trap (ATOUT) .................................................................................. 70
Address Trap Interrupt (INTATRAP)....................................................................................................... 70
Address Trap Reset ................................................................................................................................ 71
Configuration .......................................................................................................................................... 73
Control .................................................................................................................................................... 73
Function .................................................................................................................................................. 74
Configuration .......................................................................................................................................... 75
Control .................................................................................................................................................... 75
Using data transfer instructions