TMP86xy49UG/F/NG Toshiba, TMP86xy49UG/F/NG Datasheet - Page 239

• Manufacturer Part Number: TMP86xy49UG/F/NG
• Manufacturer: Toshiba

Specifications of TMP86xy49UG/F/NG

• Package: LQFP64/QFP64/SDIP64
• Rom Types (m=mask,p=otp,f=flash): M/P/F
• Rom Size: 16/32/60
• Ram Size: 512/1K/2K
• Driver Led: 13
• Driver Lcd: -
• Spi/sio Channels: 2
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 56
• Power Supply (v): 4.5 to 5.5

18.3 Function
a) STOP
check all STOP0 to STOP3 pins "H" that is enabled by STOPCR before the STOP mode is started (Note2,3).
STOP pin
Also, each level of the STOP0 to STOP3 pins can be confirmed by reading corresponding I/O port data register,
Note 1: When the STOP mode released by the edge release mode (SYSCR1<RELM> = “0”), inhibit input from STOP0 to
Note 2: When the
Note 3: The input circuit of Key-on Wakeup input and Port input is separated, so each input voltage threshold value is dif-
Note 4:
Note 5: In STOP mode, Key-on Wakeup pin which is enabled as input mode (for releasing STOP mode) by Key-on
Note 6: When the STOP mode is released by STOP0 to STOP3 pins, the level of
STOP3 pins by Key-on Wakeup Control Register (STOPCR) or must be set "H" level into STOP0 to STOP3 pins
that are available input during STOP mode.
instruction which starts STOP mode will not place in STOP mode but instead will immediately start the release
sequence (Warm up).
ferent. Therefore, a value comes from port input before STOP mode start may be different from a value which is
detected by Key-on Wakeup input (Figure 18-2).
STOP
STOP3 pins,
Wakeup Control Register (STOPCR) may generate the penetration current, so the said pin must be disabled AD
conversion input (analog voltage input).
18-3).
STOP mode
pin doesn’t have the control register such as STOPCR, so when STOP mode is released by STOP0 to
Figure 18-3 Priority of
STOP
Table 18-1 Release level (edge) of STOP mode
STOP
Figure 18-2 Key-on Wakeup Input and Port Input
Pin name
pin input is high or STOP0 to STOP3 pins input which is enabled by STOPCR is low, executing an
STOP0
STOP1
STOP2
STOP3
STOP
pin also should be used as STOP mode release function.
Key-on wakeup
Port input
Release
STOP mode
input
SYSCR1<RELM>="1"
STOP
"H" level
"L" level
"L" level
"L" level
"L" level
(Note2)
Page 222
b)
STOP pin "L"
STOP0 pin
pin and STOP0 to STOP3 pins
In case of STOP0 to STOP3
Release level (edge)
SYSCR1<RELM>="0"
External pin
STOP mode
Don’t use (Note1)
Don’t use (Note1)
Don’t use (Note1)
Don’t use (Note1)
Rising edge
STOP
pin should hold "L" level (Figure
Release
STOP mode
TMP86PM49UG