STPCI2 STMicroelectronics, STPCI2 Datasheet - Page 63

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STPCI2

Manufacturer Part Number
STPCI2
Description
STPC ATLAS DATASHEET - X86 CORE PC COMPATIBLE SYS
Manufacturer
STMicroelectronics
Datasheet

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4.5.9 IDE INTERFACE
Figure
AC characteristics of the IDE interface.
IORDY
REQ
ACK#
DD[15:0] write
CS#,DA[2:0]
DIOR#,DIOW#
DD[15:0]
CS#
DIOR#,DIOW#
DD[15:0] read
Tsetup
Name
Thold
4-13,
Figure 4-14
Parameters
DD[15:0] setup to PIOR#/SIOR# falling
DD[15:0} hold to PIOR#/SIOR# falling
and
Table 4-18
Figure 4-14. IDE DMA timing diagram
Figure 4-13. IDE PIO timing diagram
Table 4-18. IDE Interface Timing
T
setup
Issue 1.0 - July 24, 2002
lists the
T
hold
ELECTRICAL SPECIFICATIONS
T
setup
Min
15
T
0
hold
Max
-
-
Units
63/111
ns
ns

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