MSC8103M1100 Motorola / Freescale Semiconductor, MSC8103M1100 Datasheet - Page 11

• Manufacturer Part Number: MSC8103M1100
• Description: Network Processor, Networking Digital Signal Processor
• Manufacturer: Motorola / Freescale Semiconductor

Signal Name
BTM[0–1]
EE4
EE5
EED
PORESET
RSTCONF
HRESET
SRESET
Note:
1
1
1
See the Emulation and Debug chapter in the SC140 DSP Core Reference Manual for details on how to
configure these pins.
Table 1-3. Reset, Configuration, and EOnCE Event Signals (Continued)
Output
Output
Output
Type
Input
Input
Input
Input
Input
Input
Input
Input
Boot Mode 0–1
Determines the MSC8103 boot mode when PORESET is deasserted. See the Emulation
and Debug chapter in the SC140 DSP Core Reference Manual for details on how to set
these pins.
EOnCE Event 4
After PORESET is deasserted, you can configure EE4 as an input (default) or an output.
See the Emulation and Debug chapter in the SC140 DSP Core Reference Manual for
details on the ETRSMT Register.
Enable Address Event Detection Channel 4 or generate one of the EOnCE events
EOnCE Transmit Register (ETRSMT) was written by the DSP. Used to trigger external
debugging equipment.
EOnCE Event 5
After PORESET is deasserted, you can configure EE5 as an input (default) or an output.
Enable Address Event Detection Channel 5.
Detection by Address Event Detection Channel 5. Used to trigger external debugging
equipment.
Enhanced OnCE (EOnCE) Event Detection
After PORESET is deasserted, you can configure EED as an input (default) or output:
Enable the Data Event Detection Channel.
Detection by the Data Event Detection Channel. Used to trigger external debugging
equipment.
Power-On Reset
When asserted, this line causes the MSC8101 to enter power-on reset state.
Reset Configuration
Used during reset configuration sequence of the chip. A detailed explanation of its function
is provided in the “Power-On Reset Flow” and “Hardware Reset Configuration” sections of
the MSC8103 Reference Manual.
Hard Reset
When asserted, this open-drain line causes the MSC8101 to enter hard reset state.
Soft Reset
When asserted, this open-drain line causes the MSC8101 to enter soft reset state.
Reset, Configuration, and EOnCE Event Signals
Signal Description
1-7