MSC8103M1100 Motorola / Freescale Semiconductor, MSC8103M1100 Datasheet - Page 30

• Manufacturer Part Number: MSC8103M1100
• Description: Network Processor, Networking Digital Signal Processor
• Manufacturer: Motorola / Freescale Semiconductor

Communications Processor Module (CPM) Ports
1.7.2 Port B Signals
1-26
General-
Purpose
PB31
PB30
PB29
I/O
FCC2: TX_ER
MII
SCC2: RXD
SI2 TDMB2: L1TXD
TDM serial
SCC2: TXD
FCC2: RX_DV
MII
SI2 TDMB2: L1RXD
TDM serial
FCC2: TX_EN
MII
SI2 TDMB2: L1RSYNC
TDM serial
Peripheral Controller:
Name
Dedicated I/O
Protocol
Table 1-4. Port B Signals
Dedicated
Direction
I/O Data
Output
Output
Output
Output
Input
Input
Input
Input
FCC2: Media Independent Interface Transmit Error
In the MII interface supported by FCC2. TX_ER is asserted
by the MSC8103 to force propagation of transmit errors.
SCC2: Receive Data
Supported by SCC2. SCC2 receives serial data from RXD.
Time-Division Multiplexing B2: Layer 1 Transmit Data
In the TDMB2 interface supported by SI2. L1TXD supports
serial mode. TDMB2 transmits serial data out of L1TXD.
SCC2: Transmit Data.
Supported by SCC2. SCC2 transmits serial data out of TXD.
FCC2: Media Independent Interface Receive Data Valid
In the MII interface supported by FCC2, RX_DV is asserted
by an external fast Ethernet PHY. RX_DV indicates that
valid data is being sent. The presence of carrier sense, but
not RX_DV, indicates reception of broken packet headers,
probably due to bad wiring or a bad circuit.
Time-Division Multiplexing B2: Layer 1 Receive Data
In the TDMB2 interface supported by SI2. L1RXD supports
serial mode. TDMB2 receives serial data from L1RXD.
FCC2: Media Independent Interface Transmit Enable
In the MII interface supported by FCC2. TX_EN is asserted
by the MSC8103 when transmitting data.
Time-Division Multiplexing B2: Layer 1 Receive
Synchronization
In the TDMB2 interface supported by SI2, this is the
synchronizing signal for the receive channel.
Description