MSAN-141 Zarlink Semiconductor, Inc., MSAN-141 Datasheet - Page 18

• Manufacturer Part Number: MSAN-141
• Description: Implementation Details of the MT8930B-31B S-T Interface
• Manufacturer: Zarlink Semiconductor, Inc.

MSAN-141
the Rx and Tx lines, multiple TEs can be connected
without altering the characteristics impedance of the
line.
5.1 Transmitter Characteristics
The line driver incorporated on the SNIC is a
temperature compensated, voltage limited current
source having a typical I-V characteristics as shown
in Figure 16. This I-V curve reveals that when the
transmitter is active (transmitting a binary 0), the
output impedance will be greater than or equal to the
minimum specified impedance of 20 ohms when
driving the 50 ohm load (i.e., the combination of the
two 100 ohm terminating resistors). When the
transmitter is inactive, the output impedance of the
line driver will exceed the impedance template
shown in Figure 17 for the NT and Figure 18 for the
TE.
The transmitter is configured as a single-ended
driver with a minimum 50 ohm series resistor (refer
to Figure 19).
An external resistor of 40 ohms is used to present
more
transmission
(assuming a DC resistance of the transformer as
specified in Table 6). This single-ended drive will
have the effect of reducing the power consumption
by half relative to a differential drive while still
producing a nominal pulse amplitude of 750 mV. The
pulse
appropriate transformer) will comply to the pulse
template shown in Figure 20. (Figure 20 reveals the
nominal pulse template for a transmit output pulse
with overshoot limited as follows. Any overshoot on
the leading edge of a pulse is permitted up to 5% of
pulse amplitude where this amplitude is defined at
the middle of the signal element. The overshoot must
have 0.5 of its amplitude within 0.25 sec.)
A-218
Z
than
shape
2500
250
200
100
20
line
produced
ohm
2
through
load
by
Figure 18 - TE Impedance Template (log-log scale)
a
impedance
the
2:1
driver
transformer
to
20
(using
the
Frequency (kHz)
5.2 Receiver Characteristics
The MT8930B/31B requires the S-Bus signal to pass
through a 1:2 transformer before being applied to the
bipolar line receiver. The signal from the transformer
is passed through various filters and peak detectors
before the data is recovered (see Figure 21).
The lowpass filter removes any pulse overshoot and
noise which could effect the performance of the peak
detectors. The highpass filter removes low frequency
noise which may be generated by the alternate mark
inversion line code. This highpass filter will also
perform limited post equalization which will improve
the effects of intersymbol interference over long loop
lengths.
Two peak detectors, one for the positive pulses and
the second for negative pulses, are used to establish
an internal reference voltage which, in turn, will be
used as the thresholds for the input recovery circuit.
In the fixed timing mode (i.e., short passive bus) the
filters and peak detectors are bypassed with an input
threshold set to 30% of the nominal pulse amplitude
with no line attenuation. In the adaptive timing mode
the threshold for the data recovery circuit is set to
40% of the output from the peak detectors with a
7.5 mA
with max
voltage of
2.5 volt
Figure 19 - Output Equivalent Circuit
SNIC
80
50
LTx
V
Bias
V
DD
Application Note
40
1000
2:1
50