PM5380-BI PMC-Sierra, Inc., PM5380-BI Datasheet - Page 357

no-image

PM5380-BI

Manufacturer Part Number
PM5380-BI
Description
Network Interface, SATURN User Network Interface (8x155) Telecom Standard Product
Manufacturer
PMC-Sierra, Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PM5380-BI
Manufacturer:
PMC
Quantity:
648
Part Number:
PM5380-BI
Manufacturer:
PMC
Quantity:
11
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
Register 0x1106, 0x1109, 0x110C, 0x110F, 0x1112, 0x1115, 0x1118, 0x111B:
The Connect Control registers provided configuration and status for each channel.
TAPSRST:
CHFRST:
CHFERR:
Channel #0 to #7 Connect Control
The transmit APS reset (TAPSRST) bit allows the STAL blocks associated with the channel
to be reset under software control. If the TAPSRST bit is a logic one, the STAL blocks for
the channel are held in reset. This bit is not self-clearing. Therefore, a logic zero must be
written to bring the APS logic out of reset.
Holding the STAL blocks in a reset state places it into a low power, stand-by mode. A
hardware reset or top level reset using RESET clears the TAPSRST bit, thus negating the
software reset. Otherwise, the effect of the channel software reset is equivalent to that of a
hardware reset.
The transmit channel FIFO reset register (CHFRST) is used to reset the 8-byte transmit
cross connect FIFO. When the CHFRST bit is set high, the channel’s transmit connect
FIFO is held in reset. While in reset data may pass through, however there will be data
corruption if a small amount of jitter is applied at the APS input. The FIFO is held in reset
until the CHFRST is set low.
When the FIFO reset, the FIFO initialized such that the FIFO is centered (that is, the fill
level of the FIFO is 4 bytes).
The transit channel FIFO error status (CHFERR) bits indicates that the 8-byte cross connect
FIFO has overrun or underrun. The CHFERR bit is set high when the transmit cross
connect FIFO corrupts the data stream due to a FIFO overrun or underrun. The CHFERR
bit clears when the register is read, thus acknowledging the error has occurred
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R
R
R/W
R/W
Function
Unused
Unused
Unused
Unused
CSTALI
CHFERR
CHFRST
TAPSRST
S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Default
X
X
X
X
X
X
0
0
Released
357

Related parts for PM5380-BI