L9803 STMicroelectronics, L9803 Datasheet - Page 46
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L9803
Manufacturer Part Number
L9803
Description
Super Smart Power Motor Driver With 8-bit Mcu, Ram, Eeprom, Adc, Wdg, Timers, Pwm And H-bridge Driver
Manufacturer
STMicroelectronics
Datasheet
1.L9803.pdf
(126 pages)
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The active transition is software programmable through the IEDGi bit of the Control Register
(CRi).
Timing resolution is one count of the free running counter: (
Procedure
To use the input capture function select the following in the CR2 register:
And select the following in the CR1 register:
When an input capture occurs:
Clearing the Input Capture interrupt request is done by:
1.
2.
After reading the ICHRi register, transfer of input capture data is inhibited until the ICLRi
register is also read.
The ICRi register always contains the free running counter value which corresponds to the
most recent input capture.
During HALT mode, if at least one valid input capture edge occurs on the ICAPi pin, the
input capture detection circuitry is armed. This does not set any timer flags, and does not
“wake-up” the MCU. If the MCU is awoken by an interrupt, the input capture flag will become
active, and data corresponding to the first valid edge during HALT mode will be present.
–
–
–
–
–
–
–
Reading the SR register while the ICFi bit is set.
An access (read or write) to the ICLRi register.
Select the timer clock (CC1-CC0) (see
Select the edge of the active transition on the ICAP2 pin with the IEDG2 bit.
Set the ICIE bit to generate an interrupt after an input capture.
Select the edge of the active transition on the ICAP1 pin with the IEDG1 bit.
ICFi bit is set.
The ICRi register contains the value of the free running counter on the active
transition on the ICAPi pin (see
A timer interrupt is generated if the ICIE bit is set and the I bit is cleared in the
CCR register. Otherwise, the interrupt remains pending until both conditions
become true.
Figure
23).
Table 9: Clock Control
f
CPU/(CC1.CC0)
Bits).
).
L9803
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