L9803 STMicroelectronics, L9803 Datasheet - Page 52
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L9803
Manufacturer Part Number
L9803
Description
Super Smart Power Motor Driver With 8-bit Mcu, Ram, Eeprom, Adc, Wdg, Timers, Pwm And H-bridge Driver
Manufacturer
STMicroelectronics
Datasheet
1.L9803.pdf
(126 pages)
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On-Chip Peripherals
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The Pulse Width Modulation mode uses the complete Output Compare 1 function plus the
OC2R register, and so these functions cannot be used when the PWM mode is activated.
Procedure
To use Pulse Width Modulation mode:
1.
2.
3.
4.
If OLVL1=1 and OLVL2=0, the length of the positive pulse is the difference between the
OC2R and OC1R registers.
If OLVL1=OLVL2 a continuous signal will be seen on the OCMP1 pin.
The OCRi register value required for a specific timing application can be calculated using
the following formula:
Where:
t
f
PRESC = Timer prescaler factor (2, 4 or 8 depending on CC[1:0] bits,
If the timer clock is an external clock the formula is:
Where:
CPU
Load the OC2R register with the value corresponding to the period of the signal using
the formula in the section.
Load the OC1R register with the value corresponding to the period of the pulse if
OLVL1=0 and OLVL2=1, using the formula in the section.
Select the following in the CR1 register:
–
–
Select the following in the CR2 register:
–
–
–
= Signal or pulse period (in seconds)
= CPU clock frequency (in hertz)
Using the OLVL1 bit, select the level to be applied to the OCMP1 pin after a
successful comparison with OC1R register.
Using the OLVL2 bit, select the level to be applied to the OCMP1 pin after a
successful comparison with OC2R register.
Set OC1E bit: the OCMP1 pin is then dedicated to the output compare 1 function.
Set the PWM bit.
Select the timer clock (CC[1:0]) (see
see
Table 9: Clock Control Bits
Counter
= OCR1
Counter
= OCR2
When
When
OCiR Value
OCiR = t · f
Pulse Width Modulation cycle
=
OCMP1 = OLVL2
OCMP1 = OLVL1
Counter is reset
Table 9: Clock Control
ICF1 bit is set
--------------------- - 5
PRESC
t f
EXT
to FFFCh
⋅
CPU
-5
–
Bits).
L9803
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