L9803 STMicroelectronics, L9803 Datasheet - Page 51

• Manufacturer Part Number: L9803
• Description: Super Smart Power Motor Driver With 8-bit Mcu, Ram, Eeprom, Adc, Wdg, Timers, Pwm And H-bridge Driver
• Manufacturer: STMicroelectronics

L9803
Note:
Note:
2
3
4
5
1
t
f
PRESC = Timer prescaler factor (2, 4 or 8 depending on the CC[1:0] bits,
If the timer clock is an external clock the formula is:
Where:
t
f
When the value of the counter is equal to the value of the contents of the OC1R register, the
OLVL1 bit is output on the OCMP1 pin (See Figure 27).
The OCF1 bit cannot be set by hardware in One Pulse mode but the OCF2 bit can generate
an Output Compare interrupt.
When the Pulse Width Modulation (PWM) and One Pulse mode (OPM) bits are both set, the
PWM mode is the only active one.
If OLVL1=OLVL2 a continuous signal will be seen on the OCMP1 pin.
The ICAP1 pin can not be used to perform input capture. The ICAP2 pin can be used to
perform input capture (ICF2 can be set and IC2R can be loaded) but the user must take
care that the counter is reset each time a valid edge occurs on the ICAP1 pin and ICF1 can
also generates interrupt if ICIE is set.
When One Pulse mode is used OC1R is dedicated to this mode. Nevertheless OC2R and
OCF2 can be used to indicate that a period of time has elapsed but cannot generate an
output waveform because the OLVL2 level is dedicated to One Pulse mode.
The OCF1 bit cannot be set by hardware in one pulse mode but the OCF2 bit can generate
an Output Compare interrupt.
The ICF1 bit is set when an active edge occurs and can generate an interrupt if the ICIE bit
is set.
When the Pulse Width Modulation (PWM) and One Pulse Mode (OPM) bits are both set, the
PWM mode is the only active one.
Figure 27.
Pulse Width Modulation Mode
Pulse Width Modulation (PWM) mode enables the generation of a signal with a frequency
and pulse length determined by the value of the OC1R and OC2R registers.
CPU
EXT
COUNTER
= Pulse period (in seconds)
= CPU clock frequency (in hertz)
= Pulse period (in seconds)
= External timer clock frequency (in hertz)
Note: IEDG1=1, OCR1=2ED0h, OLVL1=0, OLVL2=1
OCMP1
seeTable 9: Clock Control
ICAP1
One
Pulse Mode Timing
....
FFFC FFFD FFFE
Bits).
OLVL2
compare1
2ED0 2ED1 2ED2
OLVL1
2ED3
On-Chip Peripherals
FFFC FFFD
OLVL2
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