L9803 STMicroelectronics, L9803 Datasheet - Page 48

• Manufacturer Part Number: L9803
• Description: Super Smart Power Motor Driver With 8-bit Mcu, Ram, Eeprom, Adc, Wdg, Timers, Pwm And H-bridge Driver
• Manufacturer: STMicroelectronics

On-Chip Peripherals
48/126
These registers are readable and writable and are not affected by the timer hardware. A
reset event changes the OCiR value to 8000h.
Timing resolution is one count of the free running counter: (
Procedure
To use the output compare function, select the following in the CR2 register:
And select the following in the CR1 register:
When a match is found between OCRi register and CR register:
The OCRi register value required for a specific timing application can be calculated using
the following formula:
Where:
∆t
f
PRESC
If the timer clock is an external clock, the formula
is:
Where:
∆t
f
Clearing the output compare interrupt request (i.e.clearing the OCFi bit) is done by:
1.
2.
CPU
EXT
.
–
–
–
–
–
–
–
Reading the SR register while the OCFi bit is set.
An access (read or write) to the OCiLR register.
= Output compare period (in seconds)
= External timer clock frequency (in hertz)
Set the OCiE bit if an output is needed then the OCMPi pin is dedicated to the
output compare i function.
Select the timer clock (CC[1:0]) (see
Select the OLVLi bit to applied to the OCMPi pins after the match occurs.
Set the OCIE bit to generate an interrupt if it is needed.
OCFi bit is set.
The OCMPi pin takes OLVLi bit value (OCMPi pin latch is forced low during reset).
A timer interrupt is generated if the OCIE bit is set in the CR1 register and the I bit
is cleared in the CC register (CC).
OCiR
= Output compare period (in seconds)
= CPU clock frequency (in Hz)
= Timer prescaler factor (2, 4 or 8 depending on CC[1:0] bits,
see
Table 9: Clock Control
∆OCiR
MS Byte
∆OCiR = ∆t · f
OCiHR
Bits)
=
Table 9: Clock Control
∆t f
---------------------- -
PRESC
⋅
CPU
EXT
f
CPU/CC[1:0]
Bits).
).
LS Byte
OCiLR
L9803