L9803 STMicroelectronics, L9803 Datasheet - Page 63
L9803
Manufacturer Part Number
L9803
Description
Super Smart Power Motor Driver With 8-bit Mcu, Ram, Eeprom, Adc, Wdg, Timers, Pwm And H-bridge Driver
Manufacturer
STMicroelectronics
Datasheet
1.L9803.pdf
(126 pages)
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L9803
Note:
5.3.3
Figure 29. PWM Cycle
If the CYREG value is minor or equal than DUTYREG value, PWM output remains set. With
a DUTYREG value of 0000h, the PWM output is permanently at low level, no matter of the
value of CYREG. With a DUTYREG value of FFFFh, the PWM output is permanently at high
level.
Interrupt Request
The EN_INT bit in CONREG register must be set to enable the interrupt generation. When
the 16 bits of the counter roll-over CYCLEREG value, interrupt request is set.
The interrupt request is cleared when any of the PWM registers is written.
Figure 30. PWM Generation
Register Description
The PWM is associated with a 8-bit control registers, and with two 16-bit data registers,
each split in two 8-bit registers.
PWM CYCLE REGISTER LOW (CYREGL)
PWM1 Register Address: 0011h
PWM2 Register Address: 0019h
Read/Write
Reset Value: 0000 0000 (00h)
PWM OUTPUT
COUNTER
COMPARE
VALUE
CYREG
value
000
T
(INTERNAL CLOCK)
Counter
= DUTYREG
When
Counter
= CYREG
When
x Cyreg_value
Pulse Width Modulation cycle
OUT PWM = 1
OUT PWM = 0
Counter is reset
Interrupt Generation
On-Chip Peripherals
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