ST92185B STMicroelectronics, ST92185B Datasheet - Page 121

• Manufacturer Part Number: ST92185B
• Description: 16k/24k/32k Rom Hcmos Mcu With On-screen-display
• Manufacturer: STMicroelectronics

ON SCREEN DISPLAY(Cont’d)
7.4.9 Register Description
HORIZONTAL BLANK REGISTER (HBLANKR)
R240 - Read/Write
Register Page: 32
Reset Value: 0000 0011 (03h)
It controls the length of the Horizontal Blank which
follows the horizontal sync pulse.
Bit 7:0 = HB[7:0]: The horizontal blank period is
calculated with a pixel down counter loaded on
each Hsync by HB[7:0]. During this period, FB = 0
and (R, G, B) = black.
Thblank = [(HB7*128 + HB6*64 + HB5*32 +
HB4*16 + HB3*8 + HB2*4 + HB1*2 + HB0) * Tpix]
HORIZONTAL POSITION REGISTER (HPOSR)
R241 - Read/Write
Register Page: 32
Reset Value: 0000 0011 (03h)
Bit 7:0 = HP[7:0]: The horizontal start position is
calculated with a pixel down-counter loaded on
each Hsync by HP[7:0]. The first character display
starts when the counter turns to zero.
Hori delay= [(HP7*128 + HP6*64 + HP5*32 +
HP4*16 + HP3*8 + HP2*4 + HP1*2 + HP0) * Tpix]
+ Thblank
HB7
HP7
7
7
HB6
HP6
HB5
HP5
HB4
HP4
HB3
HP3
HB2
HP2
HB1
HP1
HB0
HP0
0
0
VERTICAL POSITION REGISTER (VPOSR)
R242 - Read/Write
Register Page: 32
Reset Value: 0000 0000 (00h)
Bit 7:6 = Reserved, keep in reset state.
Bit 5:0 = VP[5:0]: The vertical start position is cal-
culated with a line downcounter decremented on
each Hsync by VP[5:0]. The Display of the first row
begins when the counter turns to zero.
Vert delay = (VP5*32 + VP4*16 + VP3*8 + VP2*4
+ VP1*2 + VP0) * Tline (Tline= 64 µs)
ST92185B - ON SCREEN DISPLAY (OSD)
7
0
0
VP5
VP4
VP3
VP2
VP1
121/178
VP0
0