ST92185B STMicroelectronics, ST92185B Datasheet - Page 86

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ST92185B

Manufacturer Part Number
ST92185B
Description
16k/24k/32k Rom Hcmos Mcu With On-screen-display
Manufacturer
STMicroelectronics
Datasheet

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ST92185B - DISPLAY STORAGE RAM INTERFACE
TDSRAM (Cont’d)
7.3.3 Initialisation
7.3.3.1 Clock Initialisation
Before initialising the TRI, first initialise the pixel
clock. Refer to the Application Examples in the
OSD chapter and to the RCCU chapter for a de-
scription of the clock control registers.
7.3.3.2 TRI Initialisation
It is recommended to wait for a stable clock issued
from the Pixel frequency multiplier before enabling
the TDSRAM interface.
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the TRI. Note: The DON bit can only be changed
while GEN=0
spp #0x26
ld config, #0x02 ; DON,GEN=0
or config, #0x01 ; set GEN=1
During and after a reset, the TDSRAM interface is
forced into its "disable" mode where the sequencer
is forced into its idle state.
Use the CONFIG register to initialise and start
Example:

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