HFC-SPCI Cologne Chip AG, HFC-SPCI Datasheet - Page 18

• Manufacturer Part Number: HFC-SPCI
• Description: Isdn S/t HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

3.2.1
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CIP / I/O-address
1100 0000
1100 0100
1100 1000
1100 1100
1101 0000
1101 1100
1111 0000
1111 0100
1111 1000
1111 1100
These registers are read/written automatically by the HDLC FIFO controller (HFC) or GCI/IOM2
bus controller and need not be accessed by the user. To read/write data the FIFOs in the Memory
Window should be used.
Registers of the S/T section
C4h
C8h
CCh
F0h
F4h
F8h
FCh
C0h
D0h
DCh
Name
SCTRL
SCTRL_E
SQ_REC
SQ_SEND
CLKDEL
B1_REC
B1_SEND
B2_REC
B2_SEND
D_REC
D_SEND
E_REC
STATES
SCTRL_R
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r/w
r/w
w
w
w
r
w
w
r
w
r
w
r
w
r
Function
State of the TE/NT state machine
S/T control register
S/T control register (extended)
receive enable for B-channels
receive register for S/Q bits
send register for S/Q bits
setup of the delay time between receive and
send direction (TE)
receive data sample time (NT)
B1-channel receive register
B1-channel transmit register
B2-channel receive register
B2-channel transmit register
D-channel receive register
D-channel transmit register
E-channel receive register
6URbeQbi !)))