HFC-SPCI Cologne Chip AG, HFC-SPCI Datasheet - Page 9
HFC-SPCI
Manufacturer Part Number
HFC-SPCI
Description
Isdn S/t HDLC Basic Rate Controller
Manufacturer
Cologne Chip AG
Datasheet
1.HFC-SPCI.pdf
(64 pages)
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Pin No.
100
16
15
14
13
12
11
10
99
98
97
26
38
27
18
93
92
19
20
21
23
22
95
94
24
25
53
91
9
4
3
2
1
5
6
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PAR
C/BE0
C/BE1
C/BE2
C/BE3
CLK
RST#
FRAME#
IRDY#
TRDY#
STOP#
IDSEL
DEVSEL#
REQ#
GNT#
PERR#
SERR#
PME
INTA#
Pin Name
Output
Input
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
I
I
I
I
Address bit 16
Address bit 17
Address bit 18
Address bit 19
Address bit 20
Address bit 21
Address bit 22
Address bit 23
Address bit 24
Address bit 25
Address bit 26
Address bit 27
Address bit 29
Address bit 30
Address bit 31
Initialisation device select
Grant
Function
Address bit 28
Parity bit
Bus command and byte enable 0
Bus command and byte enable 1
Bus command and byte enable 2
Bus command and byte enable 3
PCI clock
Reset
Cycle frame
Initiator ready
Target ready
Stop
Device select
Request
Parity error
System error
Power management event (high active)
see also: Figure 13 on page 54
Interrupt A
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