W90221X Winbond Electronics Corp America, W90221X Datasheet - Page 13

• Manufacturer Part Number: W90221X
• Description: Pa-risc Embedded Controller
• Manufacturer: Winbond Electronics Corp America

PPAR
VIN[0:7]
HIS
VSI
VCLK
CP2/C/Blue
CP1/Y/Green
CP0/Red
HSO
VSO
W90221X version 0.6
AO
AO
AO
I/O
I/O
O
O
I
I
I
114~121
113
112
110
128
129
130
134
132
66
Display and DAC interface
8-bit Video-In (VMI) Bus
PCI Parity is even parity across PDA[31:0] and C/BE[3:0]#.
PPAR is stable and valid one clock after the address phase.
For data phases, PPAR is stable and valid one clock after
either IRDY# is asserted on a write transaction or TRDY# is
asserted on a read transaction. (PPAR has the same timing
as PDA[31:0], but it is delayed by one clock.) The mater
drives PPAR for address and write data phases; the target
drives PPAR for read data phase.
During normal mode, this bus inputs 8-bit digital
components of YCbCr 4:2:2 video-in data from external video
controller (ex. TV decoder or MPEG decoder).
During test mode, this bus outputs 8-bit digital components
of YCbCr 4:2:2 video-out generated by internal video
accelerator (VA).
Horizontal Sync of video-in frames. The content of VPC[10]
(port address BA + 0x100) determines the polarity of this
signal.
Vertical Sync of video-in frames. The content of VPC[11]
determines the polarity of this signal.
This clock source serves as VMI bus pixel clock (27MHz). A
precise 27MHz clock source shall be connected to this pin.
During composite video mode (NTSC, PAL), this pin is
analog "composite video" output.
During S-Video mode, this pin is analog "chrominance"
output.
During monitor mode, this analog output supplies current
corresponding to the "blue" intensity of the pixel being
displayed.
(To maintain IBM VGA compatibility, R-G-B outputs are
typically terminated to monitor's ground with a 75 ohms 2%
resistor. This resistor, in parallel with the 75 ohms resistor in
the monitor, will yield 37.5 ohms impedance to ground. For a
full-scale voltage of 700 mV, full-scale current output will be
18.7mA.)
During composite video mode (NTSC, PAL), this pin is
analog "composite video" output.
During S-Video mode, this pin is analog "luminance" output.
During monitor mode, this analog output supplies current
corresponding to the "green" intensity of the pixel being
displayed.
During composite video mode (NTSC, PAL), this pin is
analog "composite video" output.
During S-Video mode, this pin left no connection.
During monitor mode, this analog output supplies current
corresponding to the "red" intensity of the pixel being
displayed.
Horizontal Sync of the displayed graphic output. The content
of VAconf[?] determines the polarity of this signal.
Vertical Sync of the displayed graphic output. The content of
VAconf[?] determines the polarity of this signal.
- 13 -