W90221X Winbond Electronics Corp America, W90221X Datasheet - Page 32

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W90221X

Manufacturer Part Number
W90221X
Description
Pa-risc Embedded Controller
Manufacturer
Winbond Electronics Corp America
Datasheet
5.10 WIO CONTROLLER
5.10.1 Features
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5.10.2 Related Pins
WIO bus is an ISA-like bus and shares the existing 37 pins with PCI bus bridge. When WIO
bus is enabled, only the PCI interrupt requests INTA#, INTB# and INTC# are available. The
INTD# has been used as WIO's global chip select in that case.
PDA[31:24]/WA[23:16]/WD[15:8] (In/Out)
PDA[23:8]/WA[15:0] (In/Out)
PDA[7:0]/WD[7:0] (In/Out)
C/BE3#/WIOCS# (In/Out)
C/BE2#/WROMCS# (In/Out)
C/BE1#/WWR# (In/Out)
C/BE0#/WRD# (In/Out)
W90221X version 0.6
16M (2
for IO devices
8-bit or 16-bit IO access
8-bit memory write, 32-bit data-memory read and 4*32-bit code-ROM burst read
Memory space (ROM/Flash) are always non-cacheable except code-ROM
Provide no DMA transferring
Programmable command wait states, set-up and hold time for all access
PCI cycles:
WIO memory cycle:
WIO IO cycles:
PCI cycles:
WIO cycles:
PCI cycles:
WIO memory cycles:
WIO IO cycles:
PCI cycles:
WIO cycles:
PCI cycles:
WIO cycles:
PCI cycles:
WIO cycles:
PCI cycles:
WIO cycles:
For DX3
For DX4
For DX5
For DX6
24
= 2
4
X 2
20
REG2[17:20] = 0100
REG2[17:20] = 0111
REG2[17:20] = 1001
REG2[17:20] = 1011
) addressing capacity for memory devices and 64K (2
Serve as highest byte of PCI 32-bit address/data bus.
Serve as highest byte of 24-bit address lines (WA[23:0])
during WIO memory cycles.
Serve as high byte of 16-bit data lines (WD[15:0]) during
WIO IO cycles.
Serve as bits 16-31 of PCI 32-bit address/data bus.
Serve as lower 16-bit of 24-bit address lines (WA[23:0])
during all WIO cycles.
Serve as lowest byte of PCI 32-bit address/data bus.
Serve as the 8-bit data lines during WIO memory cycles.
Serve as low byte of 16-bit data lines (WD[15:0]) during WIO
IO cycles.
Bit-3 of command/byte bus
WIO chip-select for its IO devices
Bit-2 of command/byte bus
WIO chip-select for its memory devices
Bit-1 of command/byte bus
Asserted low, if INTD# is also low, indicating a WIO write
command cycle is ongoing.
Bit-0 of command/byte bus
Asserted low, if INTD# is also low, indicating a WIO read
16
= 2
6
X 2
- 32 -
10
)

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