LPC47M172 SMSC Corporation, LPC47M172 Datasheet - Page 131

• Manufacturer Part Number: LPC47M172
• Description: ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
• Manufacturer: SMSC Corporation

7.29.1 Fan Tachometer Inputs
Note:
7.29.2 Detection of a Stalled Fan
SMSC LPC47M172
Clock Source for Counter
A fan tachometer input is used to measure the speed at which a fan is rotating. The fan tachometer input is
a train of square pulses with a 50% duty cycle (see Figure 7.5) that are derived from the magnetic fields
generated by the rotating rotor of the fan. The speed of the fan can be determined by calculating the
period of the Fan Tachometer input pulse.
All calculations are based on fans that emit 2 square pulses per revolution. Reading registers reflect a
count value for one complete revolution (2 pulses).
The clock source to the Fan Tachometer logic is 90kHz (nominal) derived from 14.318 MHz clock and is
active when VCC power is active.
Fan Tachometer Input
The counter is used to determine the period of the Fan Tachometer input pulse. This counter is reset on
the rising edge of every other fan tachometer input pulse, and thus measures the number of clock pulses
generated by the clock source for the duration of one fan tachometer revolution. Since two fan tachometer
input pulses are generated per revolution of the fan rotor, the speed of the fan is easily calculated. The fan
tachometer input resets the counter on every other pulse and simultaneously loads the count into its
respective reading register. This value is used by the operating system to monitor the speed of the fan.
The Fan Tachometer Reading registers contain the number of 11.11us periods (90kHz nominal) between
full fan revolutions. Fans produce 2 pulses per revolution. These registers are updated at least once every
second. This register is latched on the rising edge of every other fan tachometer pulse and when the fan
count reaches FFFFh. The value FFFFh indicates that the fan is not spinning (stalled fan event), or the
tachometer input is not connected to a valid signal (this could be triggered by a counter overflow)
The Fan Tachometer Reading registers always return an accurate fan tachometer measurement, even
when a fan is disabled or non-functional.
The Tachometer Reading registers are 16 bits, unsigned. When one byte of a 16-bit register is read, the
other byte latches the current value until it is read, in order to ensure a valid reading. The order is LSB
first, MSB second. These registers are read only – a write to these registers has no effect.
The fan tachometer reading registers are Tach1 LSB, Tach1_MSB, Tach2 LSB and Tach2 MSB. See
Chapter 8 Power Control Runtime Registers and Chapter 10 Runtime Register Block Runtime Registers.
The fan failure bit in the interrupt status register is set in the event of a stalled fan. Note: the fan
tachometer reading register, which holds the count value, does not roll over – it stays at FFFFh in the
Figure 7.5 - Fan Tachometer Input and Clock Source
DATASHEET
T
P
Page 131
T
R
F = 90kHz (nominal)
T
T
Advanced I/O Controller with Motherboard GLUE Logic
R
P
= Revolution Time = 60/RPM (sec)
= Pulse Time = T
SMSC/Non-SMSC Register Sets (Rev. 02-27-04)
(Two Pulses Per Revolution)
R
/2
Datasheet