LPC47M172 SMSC Corporation, LPC47M172 Datasheet - Page 146

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LPC47M172

Manufacturer Part Number
LPC47M172
Description
ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
Manufacturer
SMSC Corporation
Datasheet
Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
Note:
SMSC/Non-SMSC Register Sets (Rev. 02-27-04)
approximately 200msec. The t1 and t2 values are guaranteed by the inherent design of the system and are not
controlled by the LPC47M172.
LATCHED_BF_CUT
nBACKFEED_CUT
NAME
nBACKFEED_CUT
LATCHED_BF_CUT
t1
t2
Periods t1 and t2 should be guaranteed by the inherent design of the system. These timings are not
controlled by the LPC47M172.
There are two possible timing sequences following the power up signal sequencing. The first possible
sequence is with nSLP_S5 staying high and nBACKFEED_CUT transitioning from low to high, remaining
high for an undetermined period and then going back to low. At this point, the system returns to the end of
the power-up sequence.
During these nBACKFEED_CUT transitions, the propagation delays, rise and fall times for
LATCHED_BF_CUT are as described in the figure below. The first sequence can start at the end of the
power-up sequence at any time.
V_5P0_STBY
PWRGD_PS
PWRGD_PS
nSLP_S3
nSLP_S5
nSLP_S5 inactive to nBACKFEED_CUT
active
nSLP_S5 inactive after power rails have
stabilized
nSLP_S3
nSLP_S5
Table 7.46 - Latched Backfeed Cut Power Up Sequence Timing
Figure 7.17 - Latched Backfeed Cut Power Up Sequence
DESCRIPTION
nSLP_S5 = 1
Figure 7.18 - Latched Backfeed Cut Sequence 1
t2
DATASHEET
Tpropr
Tr
Page 146
MIN
1
t1
TYP
200
25
MAX
Tpropf
UNITS
Tf
SMSC LPC47M172
msec
msec

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