LPC47M172 SMSC Corporation, LPC47M172 Datasheet - Page 210
LPC47M172
Manufacturer Part Number
LPC47M172
Description
ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
Manufacturer
SMSC Corporation
Datasheet
1.LPC47M172.pdf
(227 pages)
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Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
Note 1:
Note 2:
SMSC/Non-SMSC Register Sets (Rev. 02-27-04)
nADDRSTB
NAME
nDATASTB
PD<7:0>
nWAIT is considered to have settled after it does not transition for a minimum of 50 ns.
When not executing a write cycle, EPP nWRITE is inactive high.
t10
t11
t12
nWRITE
t1
t2
t3
t4
t5
t6
t7
t8
t9
nWAIT
nWAIT Asserted to nWRITE Deasserted
nWAIT Asserted to nWRITE Modified (Notes 1,2)
nWAIT Asserted to PDATA Hi-Z (Note 1)
Command Asserted to PDATA Valid
Command Deasserted to PDATA Hi-Z
nWAIT Asserted to PDATA Driven (Note 1)
PDATA Hi-Z to Command Asserted
nWRITE Deasserted to Command
nWAIT Asserted to Command Asserted
nWAIT Deasserted to Command Deasserted
(Note 1)
PDATA Valid to nWAIT Deasserted
PDATA Hi-Z to nWAIT Asserted
Figure 13.14 - EPP 1.9 Data or Address Read Cycle
DESCRIPTION
t3
t1
DATASHEET
t9
t8
t7
Page 210
t4
t11
MIN
60
60
60
60
0
0
0
0
1
0
0
0
t10
TYP
t5
t12
MAX
185
190
180
190
195
180
30
t6
t2
UNITS
SMSC LPC47M172
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
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