ST72F321J ST Microelectronics, ST72F321J Datasheet - Page 137

• Manufacturer Part Number: ST72F321J
• Description: 8-BIT MCU
• Manufacturer: ST Microelectronics

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DataSheet
OPERATING CONDITIONS (Cont’d)
12.3.2 Operating Conditions with Low Voltage Detector (LVD)
Subject to general operating conditions for V
Notes:
1. Data based on characterization results, not tested in production.
2. When Vt
V
Figure 69. LVD Startup Behaviour
Note: When the LVD is enabled, the MCU reaches its authorized operating voltage from a reset state.
However, in some devices, the reset state is released when V
As a consequence, the I/Os may toggle when V
This may be an issue especially for applications where the MCU drives power components.
Because Flash write access is impossible within this window, the Flash memory contents will not be cor-
rupted.
V
V
V
Vt
t
IT+(LVD)
g(VDD)
Symbol
IT+(LVD)
IT-(LVD)
hys(LVD)
POR
4
U
.com
threshold.
POR
Reset release threshold
(V
Reset generation threshold
(V
LVD voltage threshold hysteresis
V
V
by LVD
DD
DD
DD
DD
is faster than 100 s/V, the Reset signal is released after a delay of max. 42µs after V
1.5V
0.8V
rise time
glitches filtered (not detected)
5V
V
rise)
fall)
IT+
1)
Parameter
1)2)
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1)
VD level = High in option byte
VD level = Med. in option byte
VD level = Low in option byte
VD level = High in option byte
VD level = Med. in option byte
VD level = Low in option byte
V
DD
IT+(LVD)
, f
DD
CPU
is within this window.
-V
Conditions
, and T
Window
IT-(LVD)
A
DD
.
is approximately between 0.8V and 1.5V.
t
4.0
Min
150
3.8
6
1)
Not Applicable
Not Applicable
LVD RESET
Typ
200
4.2
4.0
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4.25
Max
250
DD
4.5
40
ST72321J
1)
crosses the
137/179
Unit
mV
ns
s/V
V
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