ST72F321J ST Microelectronics, ST72F321J Datasheet - Page 169

• Manufacturer Part Number: ST72F321J
• Description: 8-BIT MCU
• Manufacturer: ST Microelectronics

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DataSheet
14 ST72321J DEVICE CONFIGURATION AND ORDERING INFORMATION
Each device is available for production in user pro-
grammable versions (FLASH) as well as in factory
coded versions (ROM). FLASH devices are
shipped to customers with a default content, while
ROM factory coded parts contain the code sup-
14.1 FLASH OPTION BYTES
The option bytes allows the hardware configura-
tion of the microcontroller to be selected. They
have no address in the memory map and can be
accessed only in programming mode (for example
using a standard ST7 programming tool). The de-
fault content of the FLASH is fixed to FFh. To pro-
gram the FLASH devices directly using ICP,
FLASH devices are shipped to customers with the
internal RC clock source enabled. In masked ROM
devices, the option bytes are fixed in hardware by
the ROM code (see option list).
OPTION BYTE 0
OPT7= WDG HALT Watchdog and HALT mode
This option bit determines if a RESET is generated
when entering HALT mode while the Watchdog is
active.
0: No Reset generation when entering Halt mode
1: Reset generation when entering Halt mode
OPT6= WDG SW Hardware or software watchdog
This option bit selects the watchdog type.
0: Hardware (watchdog always enabled)
1: Software (watchdog to be enabled by software)
OPT5 = CSS Clock security system on/off
This option bit enables or disables the clock secu-
rity system function (CSS) which include the clock
filter and the backup safe oscillator.
0: CSS enabled
Default
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7
1
WDG
1
STATIC OPTION BYTE 0
1
1
0
VD
0
0
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1
1
1
0
plied by the customer. This implies that FLASH de-
vices have to be configured by the customer using
the Option Bytes while the ROM devices are facto-
ry-configured.
1: CSS disabled
OPT4:3= VD[1:0] Voltage detection
These option bits enable the voltage detection
block (LVD, and AVD) with a selected threshold for
the LVD and AVD.
OPT1= PKG0 Package selection bit 0
This option bit is used to select the package (see
table in PKG1 option bit description).
OPT0= FMP_R Flash memory read-out protection
This option indicates if the user flash memory is
protected against read-out piracy. This protection
is based on read and a write protection of the
memory in test modes and ICP mode. Erasing the
option bytes when the FMP_R option is selected
induce the whole user memory erasing first.
Note: The is LVD not supported if read-out protec-
tion is enabled.
0: read-out protection enabled
1: read-out protection disabled
Not Used (Lowest Threshold: (V
Not Used (Med. Threshold V
Highest Voltage Threshold (V
1
7
Selected Low Voltage Detector
1
LVD and AVD Off
STATIC OPTION BYTE 1
OSCTYPE
1
1
0
0
DD
DD
2
1
~3.5V)
OSCRANGE
DD
~4V)
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~3V)
1
1
VD1
ST72321J
1
1
0
0
0
1
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VD0
0
1
0
1
0
1
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