L64118 LSI Logic Corporation, L64118 Datasheet - Page 11

• Manufacturer Part Number: L64118
• Description: Controllers, Transport Controller with Embedded MIPS CPU (TR4101)
• Manufacturer: LSI Logic Corporation

SDRAM Controller
External System Bus (EBus)
SDRAM controller module. The block includes a PID processor unit
(PPU) that is compliant with DVB and JSAT and meets the requirements
of many other service providers, including Canal+, SkyPerfect, and
BSkyB.
The unit can process up to 32 PIDs simultaneously. It provides extensive
filtering of PSI, SI, and Private Sections. The PSI, SI, and Private
Sections are filtered according to 32 user-programmable match/mask
PIDs. Section data that passes filtering is stored in cyclic buffers (in off-
chip memory) associated with each PID. Each section in each PID can
be filtered against 32 filters. (Every section undergoes a CRC32 check.
An enable bit controls the CRC checking of all section types.) The on-
chip descrambler unit increases system security. The audio and video
data are reduced to PES streams and delivered to the A/V decoder.
The SDRAM controller and resource arbitration logic makes efficient use
of SDRAM bandwidth. This chip’s low-cost system implementation
approach dictates usage of the external SDRAM for both transport and
general system functions. The L64118 supports various SDRAM
configurations using 16 Mbit and 64 Mbit devices, for a total memory size
of 2, 8, or 16 Mbytes of external SDRAM.
The SDRAM controller arbitrates access to the external SDRAM. This
logic provides the maximum possible SDRAM bandwidth to the on-chip
CPU without increasing the need for buffers or other resources.
The External System Bus is a general-purpose 16- and 32-bit system
bus used for communication with external components in the system.
This bus provides the system designer with an interface that permits the
glueless connection of devices like FLASH, ROMs, and external
peripherals.
The EBus comprises a 32-bit wide interface with multiplexed address and
data. Eight address bits are available as demultiplexed bits for easy
interface to devices that do not need the full address space. In addition
a demultiplexed mode can be configured to provide a 24-bit address and
16-bit data bus.
L64118 MPEG-2 Transport Controller with Embedded MIPS CPU (TR4101) 11