L64118 LSI Logic Corporation, L64118 Datasheet - Page 36

• Manufacturer Part Number: L64118
• Description: Controllers, Transport Controller with Embedded MIPS CPU (TR4101)
• Manufacturer: LSI Logic Corporation

Audio Clock Generator
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VVALID
These signals generate the oversampling audio clock, which drives the
L64105 external A/V decoder and a low-cost audio DAC. The audio clock
generation circuit provides oversampling audio frequencies locked to the
27 MHz program clock. The fully programmable circuit supports a wide
range of oversampling audio frequencies. It is implemented using
advanced mixed-signal technology.
ACLK
AVDD
AVSS
IREF
L64118 MPEG-2 Transport Controller with Embedded MIPS CPU (TR4101)
clocked in to the external A/V decoder. Deassertion of
VREQn indicates that the A/V decoder is not ready to
accept video data.
Video Data Valid
When asserted, this signal indicates that valid video data
is available on the AVD line. The LOW-to-HIGH transition
of SCLK causes the video data bit on the AVD[7:0] bus
to be latched in the external A/V decoder. In serial mode,
VVALID is active HIGH. In parallel mode, VVALID latches
data on the rising edge. This signal is not asserted after
reset.
Audio Clock
ACLK provides the oversampling audio clock that drives
the L64105 audio clock input and the system clock input
pin of conventional stereo audio DAC. This signal is
driven LOW after reset.
Analog VDD 3.3 V
AVDD provides the power voltage to the analog circuit of
the audio clock generator. It must be isolated from the
Digital VDD (DVDD) by a 10 H ferrite insulator.
Analog Ground
AVSS provides the analog ground to the audio clock
generator circuit. It should must be isolated from the
digital ground supply (DGND).
Current Reference
This pin must be connected as shown in Figure 5.
Output
Output
Input
Input