L64118 LSI Logic Corporation, L64118 Datasheet - Page 14
L64118
Manufacturer Part Number
L64118
Description
Controllers, Transport Controller with Embedded MIPS CPU (TR4101)
Manufacturer
LSI Logic Corporation
Datasheet
1.L64118.pdf
(68 pages)
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DMA Controller
Addressing
14
The L64118 integrates a four-channel DMA controller that reduces a
major portion of the load the CPU might incur during data transfer
between peripheral ports, memory, and elements residing on the EBus.
One DMA channel is dedicated for data transfers between the IEEE1284
port and main memory. The other three DMA channels are general-
purpose. One general-purpose DMA channel (Channel #1) supports
transfers between PBus and Ebus devices.
In typical applications, one DMA channel can be assigned to a
SmartCard, one channel to a serial port, and one to memory to memory
data transfers.
The MIPS architecture uses two types of addresses: virtual addresses
(used in a program), and physical addresses (that appear on an address
bus). This allows support of kernel and user modes, while combining
cacheable and noncacheable addresses.
Virtual addresses are partitioned into four, fixed-size segments: kuseg ,
kseg0 , kseg1 , and kseg2 , according to Table 1.
Table 1
The kuseg addresses are accessible in user and kernel mode; they are
for use by user-mode programs, while also providing direct access
(requiring no system call) to those same addresses in kernel mode.
Because the L64118 does not have a Memory Management Unit (MMU),
kuseg addresses are mapped unchanged to physical addresses. The
L64118 does not map kseg2 ; thus, kseg2 addresses cannot be used by
L64118 MPEG-2 Transport Controller with Embedded MIPS CPU (TR4101)
Virtual CPU Address [31:29]
0b000–0b011
0b100
0b101
0b110–0b111
Memory Segment Address Mapping
Segment
kuseg
kseg0 (cache)
kseg1 (noncache)
kseg2 (not used)
Size
2 Gbytes
512 Mbytes
512 Mbytes
1 Gbytes
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