L64118 LSI Logic Corporation, L64118 Datasheet - Page 12
L64118
Manufacturer Part Number
L64118
Description
Controllers, Transport Controller with Embedded MIPS CPU (TR4101)
Manufacturer
LSI Logic Corporation
Datasheet
1.L64118.pdf
(68 pages)
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Peripherals
12
The EBus controller registers let the user program customized timing for
each address space used in a given system. Six address spaces are
supported, each with a dedicated chip select output.
The main features of the EBus are:
The EBus supports the following main signals:
The L64118 integrates several serial and parallel ports, providing a high
degree of connectivity to various types of peripherals. The
communication ports include:
L64118 MPEG-2 Transport Controller with Embedded MIPS CPU (TR4101)
32-bit physical addressing space
32-bit data width
Synchronized to 27 MHz clock
Five external interrupt ports
32-bit multiplexed address/data
8-bit demultiplexed (low order) address bits
RDn
WRn
EACKn
ALE (Address latch enable)
Five dedicated chip-selects and one multiplexed (with memory
strobe) chip select
4-bit byte enable bus
27 MHz output clock
Three 8251 RS232 serial communication ports connect the set-top
box to a dumb monitor, modem, or PC. The modem communicates
between the subscriber and the main station, or back channel.
One serial I/O includes a V24-compatible UART for a glueless
connection to modem datapump ICs.
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