MCP1726T-ADJZEMF Microchip Technology, MCP1726T-ADJZEMF Datasheet - Page 18

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MCP1726T-ADJZEMF

Manufacturer Part Number
MCP1726T-ADJZEMF
Description
Regulator, Extended Industrial, HVSON, 8-Pin|
Manufacturer
Microchip Technology
Datasheet
PIC12F683
2.2.2.6
The Power Control (PCON) register contains flag bits
(See Table 12-2) to differentiate between a:
• Power-on Reset (POR)
• Brown-out Detect (BOD)
• Watchdog Timer Reset (WDT)
• External MCLR Reset
The PCON register also controls the ultra low-power
wake-up and software enable of the BOD.
The PCON register bits are shown in Register 2-6.
REGISTER 2-6:
DS41211A-page 16
bit 7-6
bit 5
bit 4
bit 3-2
bit 1
bit 0
PCON Register
PCON — POWER CONTROL REGISTER (ADDRESS: 8Eh)
bit 7
Unimplemented: Read as ‘0’
ULPWUE: Ultra Low-power Wake-up Enable bit
1 = Ultra Low-power Wake-up enabled
0 = Ultra Low-power Wake-up disabled
SBODEN: Software BOD Enable bit
1 = BOD enabled
0 = BOD disabled
Unimplemented: Read as ‘0’
POR: Power-on Reset Status bit
1 = No Power-on Reset occurred
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
BOD: Brown-out Detect Status bit
1 = No Brown-out Detect occurred
0 = A Brown-out Detect occurred (must be set in software after a Brown-out Detect occurs)
Note 1:
Legend:
R = Readable bit
- n = Value at POR
U-0
BODEN<1:0> = ‘01’ in Configuration Word for this bit to control the BOD.
U-0
Advance Information
ULPWUE SBODEN
R/W-0
W = Writable bit
‘1’ = Bit is set
(1)
R/W-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
 2003 Microchip Technology Inc.
x = Bit is unknown
R/W-0
POR
R/W-x
BOD
bit 0

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